參數(shù)資料
型號: ICS1531
英文描述: Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator
中文描述: 三8位MSPS的的A / D轉(zhuǎn)換器與電源同步時鐘發(fā)生器
文件頁數(shù): 49/76頁
文件大?。?/td> 529K
代理商: ICS1531
Chapter 6
Register Set
ICS1531 Rev N 12/1/99
December, 1999
49
Copyright 1999, Integrated Circuit Systems, Inc.
All rights reserved.
ICS1531 Data Sheet - Preliminary
6.5.35
Register 33h: B_COARSE
The B_COARSE Register is the first adjustment for the blue channel of the ADC. It is used to coarsely
adjust the analog signal used by the ADC. (See also
Section 6.5.38, “Register 36h: B_FINE”
.)
Table 6-34.
B_COARSE Register
Bit
Bit Name
Bit Definition
Ac-
cess
Spec.
Func.
Re-
set
33:7-
33:6
Reserved
Reserved.
See
Section 6.1, “Reserved Bits”
.
These bits can be programmed to ‘0’.
0
33:5
Reserved
Reserved.
See
Section 6.1, “Reserved Bits”
.
This bit must be programmed to ‘1’.
1
33:4-
33:2
Reserved
Reserved.
See
Section 6.1, “Reserved Bits”
.
These bits can be programmed to ‘0’.
0
33:1-
33:0
B_Coarse_ADJ
[1-0]
Blue Coarse (Gain) Adjust [1-0].
These bits adjust the blue channel of the ADC by adjusting the
gain of the video amplifier for the analog signal used by the
ADC.
0 = The gain is 1.0 (default).
1 = The gain is 1.2.
2 = The gain is 1.4 (typical).
3 = The gain is 1.6.
R/W
0
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參數(shù)描述
ICS1532 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:110 MHZ TRIPLE 8-BIT ADC WITH CLOCK GENERATOR
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ICS1560N-003 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator