參數(shù)資料
型號(hào)： HYB25D256400T-8
英文描述： DDR Synchronous DRAM
中文描述： DDR同步DRAM
文件頁(yè)數(shù)： 50/76頁(yè)
文件大?。?/td> 1218K
代理商： HYB25D256400T-8
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Page 50 of 76
2002-05-06
Operating Conditions
Absolute Maximum Ratings
Symbol
Parameter
Rating
Units
V
I
N
, V
OUT
Voltage on I/O pins relative to V
SS
0.5 to V
DDQ
+
0.5
0.5 to
+
3.6
V
V
I
N
Voltage on Inputs relative to V
SS
V
V
DD
Voltage on V
DD
supply relative to V
SS
0.5 to
+
3.6
V
V
DDQ
Voltage on V
DDQ
supply relative to V
SS
0.5 to
+
3.6
0 to
+
70
55 to
+
150
V
°
C
°
C
T
A
Operating Temperature (Ambient)
T
ST
G
Storage Temperature (Plastic)
P
D
Power Dissipation
1.0
W
I
OUT
Short Circuit Output Current
50
mA
Note:
Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sec-
tions of this specification is not implied.
E
xposure to absolute maximum rating conditions for extended periods may affect reliability.
Input and Output Capacitances
Parameter
Symbol
Min.
Max.
Units
N
otes
Input Capacitance: CK, CK
C
I1
2.0
3.0
pF
1
Delta Input Capacitance: CK, CK
C
dI1
-
0.25
pF
1
Input Capacitance: All other input-only pins
C
I2
2.0
3.0
pF
1
Delta Input Capacitance: All other input-only pins
C
dI2
-
0.5
pF
1
Input/Output Capacitance: DQ, DQS, DM
C
IO
4.0
5.0
pF
1, 2
Delta Input/Output Capacitance : DQ, DQS, DM
C
dIO
-
0.5
pF
1
1. These values are guaranteed by design and are tested on a sample base only. V
DDQ
= V
DD
= 2.5V
±
0.2V, f = 100M
H
z, T
A
= 25
°
C,
V
OUT
(DC) = V
DDQ/2
, VOUT (Peak to Peak) 0.2V. Unused pins are tied to groundVOUT (Peak to Peak) = 0.2V.
2. DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching
at the board level.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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HYB25D256800AT-8 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:DDR Synchronous DRAM
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