參數(shù)資料
型號(hào): HYB25D128800T-7
英文描述: ?128Mb (16Mx8) DDR 266A (2-3-3)?
中文描述: ?128Mb的(16Mx8復(fù)員266A章)(2-3-3)?
文件頁數(shù): 40/76頁
文件大?。?/td> 1218K
代理商: HYB25D128800T-7
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Page 40 of 76
2002-05-06
Write to Precharge: Interrupting (Burst Length = 4 or 8)
DI a-b = data in for bank a, column b.
An interrupted burst is shown, 2 data elements are written.
1 subsequent element of data in is applied in the programmed order following DI a-b.
t
W
R
is referenced from the first positive CK edge after the last desired data in pair.
The Precharge command masks the last 2 data elements in the burst, for burst length = 8.
A10 is Low with the
W
rite command (Auto Precharge is disabled).
1 = Can be don
'
t care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don
'
t care at this point.
3 = These bits are incorrectly written into the memory array if DM is low.
Don’t Care
T1
T2
T3
T4
T5
T6
N
OP
N
OP
N
OP
PR
E
W
rite
N
OP
CK
CK
Command
Address
Maximum DQSS
DI a-b
1
1
2
DQS
DQ
DM
t
DQSS
(max)
t
RP
T1
T2
T3
T4
T5
T6
N
OP
N
OP
N
OP
PR
E
W
rite
N
OP
CK
CK
Command
Address
BA a, COL b
BA (a or all)
Minimum DQSS
t
W
R
t
RP
DI a-b
1
1
DQS
DQ
DM
t
DQSS
(min)
2
BA a, COL b
BA (a or all)
t
W
R
3
3
3
3
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