參數(shù)資料
型號(hào)： HYB18T512800AF-5
廠商： INFINEON TECHNOLOGIES AG
英文描述： 512-Mbit Double-Data-Rate-Two SDRAM
中文描述： 512兆雙數(shù)據(jù)速率2內(nèi)存
文件頁數(shù)： 35/96頁
文件大?。?/td> 1571K
代理商： HYB18T512800AF-5
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Functional Description
Data Sheet
35
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
Mode exit:
As long as the timing parameter
t
AXPD, min
is satisfied
when ODT is turned on or off after exiting these power-
down modes, synchronous timing parameters can be
applied. If
t
AXPD, min
is not satisfied, asynchronous timing
parameters apply.
Figure 16
ODT Mode exit Timing Diagram
2.5
Bank Activate Command
The Bank Activate command is issued by holding CAS
and WE high with CS and RAS low at the rising edge of
the clock. The bank addresses BA[1:0] are used to
select the desired bank. The row addresses A0 through
A13 are used to determine which row to activate in the
selected bank for
×
4 and
×
8 organised components.
For
×
16 components row addresses A0 through A12
have to be applied. The Bank Activate command must
be applied before any Read or Write operation can be
executed. Immediately after the bank active command,
the DDR2 SDRAM can accept a read or write command
(with or without Auto-Precharge) on the following clock
cycle. If a R/W command is issued to a bank that has
not satisfied the
t
RCD, min
specification, then additive
latency must be programmed into the device to delay
the R/W command which is internally issued to the
device. The additive latency value must be chosen to
assure
t
RCD, min
is satisfied. Additive latencies of 0, 1, 2,
3 and 4 are supported. Once a bank has been activated
it must be precharged before another Bank Activate
command can be applied to the same bank. The bank
active and precharge times are defined as
t
RAS
and
t
RP
,
CKE
tAXPD
ODT04
ODT turn-off, tAXPD >= tAXPDmin:
Rtt
Rtt
tAONPDmax
T
0
T
1
T
5
T
6
T
7
T
8
t
IS
Synchronous
timings apply
T
9
ODT turn-off, tAXPD < tAXPDmin:
Asynchronous
timings apply
ODT
tAOFD
Rtt
ODT
tAOFPDmax
Rtt
ODT turn-on, tAXPD >= tAXPDmin:
Synchronou s
timings apply
tAOND
t
IS
t
IS
ODT
t
IS
ODT
t
IS
ODT turn-on, tAXPD < tAXPDmin:
Asynchronous
timings apply
T10
CK, CK
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