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參數(shù)資料
| 型號： | HUF76105DK8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 功率晶體管 |
| 英文描述： | 5A, 30V, 0.050 Ohm, Dual N-Channel,Logic Level UltraFET Power MOSFET(5A, 30V, 0.050 Ω,雙N溝道,邏輯電平,UltraFET功率MOS場效應管) |
| 中文描述： | 5 A, 30 V, 0.072 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 176K |
| 代理商： | HUF76105DK8 |
7
Thermal Resistance vs. Mounting Pad
Area
The maximum rated junction temperature, T
JM
, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, P
DM
, in an
application. Therefore the application’s ambient temperature,
T
A
(
o
C), and thermal resistance R
θ
JA
(
o
C/W) must be
reviewed to ensure that T
JM
is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of P
DM
is complex
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board
2. The number of copper layers and the thickness of the board
3. The use of external heat sinks
4. The use of thermal vias
5. Air flow and board orientation
6. For non-steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 23 defines the R
θ
JA
for the device as a function of the top copper (component side)
area. This is for a horizontally positioned FR-4 board with 1oz
copper after 1000 seconds of steady state power with no air
flow. This graph provides the necessary information for
calculation of the steady state junction temperature or power
dissipation. Pulse applications can be evaluated using the
Intersil device Spice thermal model or manually utilizing the
normalized maximum transient thermal impedance curve.
Displayed on the curve are R
θ
JA
values listed in the Electrical
Specifications table. The points were chosen to depict the
compromise between the copper board area, the thermal
resistance and ultimately the power dissipation, P
DM
.
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
FIGURE 21. SWITCHING TIME TEST CIRCUIT
FIGURE 22. SWITCHING TIME WAVEFORMS
Test Circuits and Waveforms
(Continued)
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
V
DD
Q
g(TH)
V
GS
= 1V
Q
g(5)
V
GS
= 5V
Q
g(TOT)
V
GS
= 10
V
DS
V
GS
I
g(REF)
0
0
V
GS
R
L
R
GS
DUT
+
-
V
DD
V
DS
V
GS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
(EQ. 1)
PDM
θ
JA
–
(
------------------------------
)
=
HUF76105DK8
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HUF76105DK8T | 功能描述:MOSFET USE 512-FDS6930A Logic Level N-Ch RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| HUF76105SK8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5.5A, 30V, 0.050 Ohm, N-Channel, Logic Level UltraFET Power MOSFET |
| HUF76105SK8T | 功能描述:MOSFET 5a 30V 0.050 Ohm Logic Level N-Ch RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| HUF76107D3 | 功能描述:MOSFET RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| HUF76107D3S | 功能描述:MOSFET RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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