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參數(shù)資料
| 型號： | HT48C06 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | Cost-Effective I/O Type 8-Bit MCU |
| 中文描述： | 成本效益的I / O型8位微控制器 |
| 文件頁數(shù)： | 13/38頁 |
| 文件大小： | 264K |
| 代理商： | HT48C06 |
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HT48R05A-1/HT48C05/HT48R06A-1/HT48C06
Rev. 1.10
13
June 9, 2004
Timer/Event Counter
A timer/event counter (TMR) is implemented in the
microcontroller.Thetimer/eventcountercontainsan8-bit
programmablecount-upcounterandtheclockmaycome
from an external source or the system clock.
Usingexternalclockinputallowstheusertocountexter-
nal events, measure time internals or pulse widths, or
generate an accurate time base. While using the inter-
nal clock allows the user to generate an accurate time
base.
The timer/event counter can generate PFD signal by us-
ing external or internal clock and PFD frequency is de-
termine by the equation f
INT
/[2 (256-N)].
There are 2 registers related to the timer/event counter;
TMR ([0DH]), TMRC ([0EH]). Two physical registers are
mapped to TMR location; writing TMR makes the start-
ing value be placed in the timer/event counter preload
register and reading TMR retrieves the contents of the
timer/event counter. The TMRC is a timer/event counter
control register, which defines some options.
The TM0, TM1 bits define the operating mode. The
event count mode is used to count external events,
which means the clock source comes from an external
(TMR) pin. The timer mode functions as a normal timer
with the clock source coming from the f
INT
clock. The
pulse width measurement mode can be used to count
the high or low level duration of the external signal
(TMR). The counting is based on the f
INT
clock.
In the event count or timer mode, once the timer/event
counter starts counting, it will count from the current
contents in the timer/event counter to FFH. Once over-
flow occurs, the counter is reloaded from the timer/event
counter preload register and generates the interrupt re-
quest flag (TF; bit 5 of INTC) at the same time.
In the pulse width measurement mode with the TON
and TE bits equal to one, once the TMR has received a
transient from low to high (or high to low if the TE bits is
0 ) it will start counting until the TMR returns to the orig-
inal level and resets the TON. The measured result will
remain in the timer/event counter even if the activated
Label
(TMRC)
Bits
Function
PSC0~PSC2
0~2
To define the prescaler stages, PSC2, PSC1, PSC0=
000: f
INT
=f
SYS
/2
001: f
INT
=f
SYS
/4
010: f
INT
=f
SYS
/8
011: f
INT
=f
SYS
/16
100: f
INT
=f
SYS
/32
101: f
INT
=f
SYS
/64
110: f
INT
=f
SYS
/128
111: f
INT
=f
SYS
/256
TE
3
To define the TMR active edge of the timer/event counter
(0=active on low to high; 1=active on high to low)
TON
4
To enable or disable timer counting
(0=disabled; 1=enabled)
5
Unused bit, read as 0
TM0
TM1
6
7
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMRC Register
" 0 + %
% + " % ! % # $
, %
' , $ .
# $
0
' ! %
E % # $
" # $ %
% 0 ,
%
' + $ %
' ! %
E % # $
" # $ %
$
" +
% 0 ,
E %
0 F
$
# $ %
" & $
4 ; + $
%
% + ( 0 %
4 ;
Timer/Event Counter
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