參數(shù)資料
型號(hào): HT48C06
廠商: Holtek Semiconductor Inc.
英文描述: Cost-Effective I/O Type 8-Bit MCU
中文描述: 成本效益的I / O型8位微控制器
文件頁(yè)數(shù): 12/38頁(yè)
文件大?。?/td> 264K
代理商: HT48C06
HT48R05A-1/HT48C05/HT48R06A-1/HT48C06
Rev. 1.10
12
June 9, 2004
An extra option load time delay is added during system
reset (power-up, WDT time-out at normal mode or RES
reset).
The functional unit chip reset status are shown below.
PC
000H
Interrupt
Disable
Prescaler
Clear
WDT
Clear. After master reset,
WDT begins counting
Timer/Event Counter
Off
Input/Output Ports
Input mode
SP
Points to the top of the stack
!
% + % $
>
-
0 ,
% + % $
* + $ % !
% + % $
; @ ' $
' & & 0 %
" # $ %
Reset Configuration
=
=
C
9 D
C
9 D
Reset Circuit
Note:
* Make the length of the wiring, which is con-
nected to the RES pin as short as possible, to
avoid noise interference.
$
' ! % ; " $
. ' &
% + % $
Reset Timing Chart
The states of the registers is summarized in the table.
Register
Reset
(Power On)
WDT time-out
(Normal Operation)
RES Reset
(Normal Operation)
RES Reset
(HALT)
WDT Time-out
(HALT)*
TMR
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
TMRC
00-0 1000
00-0 1000
00-0 1000
00-0 1000
uu-u uuuu
Program
Counter
000H
000H
000H
000H
000H
MP
-xxx xxxx
-uuu uuuu
-uuu uuuu
-uuu uuuu
-uuu uuuu
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
--uu uuuu
--uu uuuu
--uu uuuu
STATUS
--00 xxxx
--1u uuuu
--uu uuuu
--01 uuuu
--11 uuuu
INTC
--00 -000
--00 -000
--00 -000
--00 -000
--uu -uuu
WDTS
0000 0111
0000 0111
0000 0111
0000 0111
uuuu uuuu
PA
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PAC
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PB
---- -111
---- -111
---- -111
---- -111
---- -uuu
PBC
---- -111
---- -111
---- -111
---- -111
---- -uuu
PC
---- --11
---- --11
---- --11
---- --11
---- --uu
PCC
---- --11
---- --11
---- --11
---- --11
---- --uu
Note:
* means
u means
x means
warm reset
unchanged
unknown
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