參數(shù)資料
型號: HT48C06
廠商: Holtek Semiconductor Inc.
英文描述: Cost-Effective I/O Type 8-Bit MCU
中文描述: 成本效益的I / O型8位微控制器
文件頁數(shù): 10/38頁
文件大?。?/td> 264K
代理商: HT48C06
HT48R05A-1/HT48C05/HT48R06A-1/HT48C06
Rev. 1.10
10
June 9, 2004
It is recommended that a program does not use the
CALL subroutine within the interrupt subroutine. In-
terrupts often occur in an unpredictable manner or need
to be serviced immediately in some applications. If only
one stack is left and enabling the interrupt is not well
controlled, the original control sequence will be dam-
aged once the CALL operates in the interrupt subrou-
tine.
Oscillator Configuration
There are two oscillator circuits in the microcontroller.
Both are designed for system clocks, namely the RC os-
cillator and the Crystal oscillator, which are determined
by the options. No matter what oscillator type is se-
lected, the signal provides the system clock. The HALT
mode stops the system oscillator and ignores an exter-
nal signal to conserve power.
If an RC oscillator is used, an external resistor between
OSC1 and VDD is required and the resistance must
range from 24k
4, is available on OSC2, which can be used to synchro-
nize external logic. The RC oscillator provides the most
cost effective solution. However, the frequency of oscil-
lation may vary with VDD, temperatures and the chip it-
self due to process variations. It is, therefore, not
suitable for timing sensitive operations where an accu-
rate oscillator frequency is desired.
to 1M . The system clock, divided by
If the Crystal oscillator is used, a crystal across OSC1
and OSC2 is needed to provide the feedback and phase
shift required for the oscillator, and no other external
components are required. Instead of a crystal, a resona-
tor can also be connected between OSC1 and OSC2 to
get a frequency reference, but two external capacitors in
OSC1 and OSC2 are required (If the oscillating fre-
quency is less than 1MHz).
The WDT oscillator is a free running on-chip RC oscilla-
tor, and no external components are required. Even if
the system enters the power down mode, the system
clock is stopped, but the WDToscillator still works with a
period of approximately 65 s@5V. The WDT oscillator
can be disabled by options to conserve power.
Watchdog Timer
WDT
The clock source of WDTis implemented by a dedicated
RC oscillator (WDT oscillator) or instruction clock (sys-
tem clock divided by 4), decided by options. This timer is
designedtopreventasoftwaremalfunctionorsequence
from jumping to an unknown location with unpredictable
results. The Watchdog Timer can be disabled by an op-
tion. If the Watchdog Timer is disabled, all the execu-
tions related to the WDT result in no operation.
Once the internal WDT oscillator (RC oscillator with a
period of 65 s@5V normally) is selected, it is first di-
vided by 256 (8-stage) to get the nominal time-out pe-
riod of approximately 17ms@5V. This time-out period
may vary with temperatures, VDD and process varia-
tions. By invoking the WDT prescaler, longer time-out
periods can be realized. Writing data to WS2, WS1,
WS0 (bit 2,1,0 of the WDTS) can give different time-out
periods. If WS2, WS1, and WS0 are all equal to 1, the di-
vision ratio is up to 1:128, and the maximum time-out
period is 2.1s@5V seconds. If the WDT oscillator is dis-
abled, the WDTclock may still come from the instruction
clock and operate in the same manner except that in the
HALT state the WDT may stop counting and lose its pro-
tecting purpose. In this situation the logic can only be re-
started by external logic. The high nibble and bit 3 of the
WDTS are reserved for user s defined flags, which can
be used to indicate some specified status.
If the device operates in a noisy environment, using the
on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT will stop the system clock.
* + $ % !
0 ( =
4 ; @ ' $
" # $ %
% + ( 0 %
; @ ' $
" # $ %
4 ; $ ;
' ! % ; " $
& $ ' #
% 0 % ( $
Watchdog Timer
* + $ 0
+ ( ' 0 0 $
+ ( ' 0 0 $
& % #
' #
& 9
System Oscillator
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