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參數(shù)資料
| 型號： | HT46R221 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit A/D Type MCU |
| 中文描述： | 8位A / D型微控制器 |
| 文件頁數(shù)： | 8/46頁 |
| 文件大?。?/td> | 390K |
| 代理商： | HT46R221 |
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HT46R22/HT46C22
Rev. 1.10
8
October 2, 2002
Stack register
STACK
This is a special part of the memory which is used to
save the contents of the program counter (PC) only. The
stack is organized into 6 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledgment, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack.Afterachipreset,theSPwillpointtothetopofthe
stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledgment will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a CALL is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 6 return ad-
dresses are stored).
Data memory
RAM
The data memory is designed with 92 8 bits. The data
memory is divided into two functional groups: special
function registers and general purpose data memory
(64 8). Most are read/write, but some are read only.
The special function registers include the indirect ad-
dressing register (00H), timer/event counter register
(TMR;0DH), timer/event counter control register
(TMRC;0EH), program counter lower-order byte regis-
ter (PCL;06H), memory pointer register (MP;01H), ac-
cumulator (ACC;05H), table pointer (TBLP;07H), table
higher-order byte register (TBLH;08H), status register
(STATUS;0AH), interrupt control register 0 (INTC0;
0BH), PWM data register (PWM;1AH), the I
2
C BUS
slave address register (HADR;20H), the I
2
C BUS con-
trol register (HCR;21H), the I
2
C BUS status register
(HSR;22H), the I
2
C BUS data register (HDR;23H), the
A/D result lower-order byte register (ADRL;24H), the
A/D result higher-order byte register (ADRH;25H), the
A/D control register (ADCR;26H), the A/D clock setting
register (ACSR;27H), I/O registers (PA;12H, PB;14H,
PC;16H, PD;18H) and I/O control registers (PAC;13H,
PBC;15H, PCC;17H, PDC;19H). The remaining space
before the 40H is reserved for future expanded usage
and reading these locations will get 00H . The general
purpose data memory, addressed from 40H to 7FH, is
used for data and control information under instruction
commands.
All of the data memory areas can handle arithmetic,
logic, increment, decrement and rotate operations di-
rectly. Except for some dedicated bits, each bit in the
data memory can be set and reset by SET [m].i and
CLR [m].i . They are also indirectly accessible through
memory pointer register (MP;01H).
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RAM mapping
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT46C23 | A/D Type 8-Bit MCU |
| HT46C24 | A/D Type 8-Bit MCU |
| HT46R24 | A/D Type 8-Bit MCU |
| HT46C46 | Cost-Effective A/D Type 8-Bit MCU |
| HT46C47 | Cost-Effective A/D Type 8-Bit MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT46R23 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit OTP Microcontroller |
| HT46R232 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:A/D Type 8-Bit MCU |
| HT46R24 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:A/D Type 8-Bit MCU |
| HT46R24_06 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:A/D Type 8-Bit MCU |
| HT46R32 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:A/D Type 8-Bit OTP MCU with OPA |
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