參數(shù)資料
型號(hào): HSP50215EVAL
廠商: Intersil Corporation
英文描述: DSP Modulator Evaluation Board
中文描述: DSP的調(diào)制器評(píng)估板
文件頁(yè)數(shù): 17/21頁(yè)
文件大?。?/td> 157K
代理商: HSP50215EVAL
3-438
2
Delay Select
DLYSEL.
1 = no delay.
0 = 1/2 coarse sample delay.
1-0
Mod Type
MOD(1:0):
00 = QASK.
01 = FM with filtering after modulation (analog FM with baseband filtering provided before
HSP50215). In this mode, both I and Q filters are used.
10 = FM with filtering before modulation (FSK, GMSK). This mode uses only the I filter bank.
11 = not used.
CONTROL ADDRESS 17: GAIN CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-8
Reserved
Reserved.
7-0
Output Gain
OUTGAIN(7:0)
CONTROL WORDS 18: FIFO CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-3
Reserved (Note 1)
Reserved (Note 1).
2-0
FIFORDY Threshold
RTH(2:0). Programmable FIFO READY Threshold. This digital word represents the FIFO depth
threshold (number of data samples in the FIFO) at which the FIFORDY will be asserted, alerting the
data source that more input data is required in the FIFO. The FIFO threshold sets both the I and Q
FIFO thresholds. RTH2 is the MSB.
CONTROL WORDS 19: POLYPHASE CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-6
Reserved (Note 1)
Reserved (Note 1).
5-2
DS
DS(3:0). Number of data samples in shaping filter, 4-16. Load with number of data samples minus 1.
1-0
IP
IP(1:0). Number of interpolation phases:
00 = not valid.
01 = 4.
10 = 8.
11 = 16.
CONTROL ADDRESS 16: MODULATION CONTROL (Continued)
BIT
POSITION
FUNCTION
DESCRIPTION
OUTGAIN (7:0)
ATTENUATION
(dBFS)
SCALING GAIN
((V
OUT
/V
IN
)%)
99.6
1111 1111
-0.033996
1000 0000
-6.021
50.0
0100 0000
-12.041
25.0
0010 0000
-18.062
12.5
0001 0000
-24.082
6.25
0000 1000
-30.103
3.125
0000 0100
-36.124
1.5625
0000 0010
-42.144
0.78125
0000 0001
-48.165
0.390625
HSP50215
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