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參數(shù)資料
| 型號(hào)： | HS2-117RH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 5.0 AMP POSITIVE VOLTAGE REGULATOR |
| 中文描述： | 1.2 V-37 V ADJUSTABLE POSITIVE REGULATOR, MBCY3 |
| 封裝： | GREEN, METAL CAN, TO-39, 3 PIN |
| 文件頁(yè)數(shù)： | 2/2頁(yè) |
| 文件大?。?/td> | 60K |
| 代理商： | HS2-117RH-Q |
2
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Die Characteristics
DIE DIMENSIONS
2616
μ
m x 2794
μ
m (103 mils x 110 mils)
483
μ
m
±
25.4
μ
m (19 mils
±
1 mil)
INTERFACE MATERIALS
Glassivation
Type: Silox (SiO
2
)
Thickness: 8.0k
±
1.0k
Top Metallization
Type: AlSiCu
Thickness: 16.0k
±
2k
Substrate
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish
Gold
ASSEMBLY RELATED INFORMATION
Substrate Potential
Unbiased (DI)
ADDITIONAL INFORMATION
Worst Case Current Density
<2.0 x 10
5
A/cm
2
Transistor Count
95
Metallization Mask Layout
HS-117RH
V
OUT
V
OUT
V
IN
V
IN
ADJ
V
OUTK
HS-117RH
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