參數(shù)資料
型號(hào): HS1-80C85RH-Q
廠商: INTERSIL CORP
元件分類: 微控制器/微處理器
英文描述: Radiation Hardened 8-Bit CMOS Microprocessor
中文描述: 8-BIT, 2 MHz, MICROPROCESSOR, CDIP40
封裝: SIDE BRAZED, METAL SEALED, CERAMIC, DIP-40
文件頁數(shù): 1/16頁
文件大小: 758K
代理商: HS1-80C85RH-Q
1
File Number
3036.3
HS-80C85RH
Radiation Hardened 8-Bit CMOS
Microprocessor
The HS-80C85RH is an 8-bit CMOS microprocessor
fabricated using the Intersil radiation hardened self-aligned
junction isolated (SAJI) silicon gate technology. Latch-up
free operation is achieved by the use of epitaxial starting
material to eliminate the parasitic SCR effect seen in
conventional bulk CMOS devices.
The HS-80C85RH is a functional logic emulation of the
HMOS 8085 and its instruction set is 100% software
compatible with the HMOS device. The HS80C85RH is
designed for operation with a single 5 volt power supply. Its
high level of integration allows the construction of a radiation
hardened microcomputer system with as few as three ICs
(HS-80C85RH CPU, HS83C55RH ROM I/O, and the
HS-81C55/56RH RAM I/O.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95824. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Features
Electrically Screened to SMD # 5962-95824
QML Qualified per MIL-PRF-38535 Requirements
Radiation Hardened EPI-CMOS
- Parametrics Guaranteed . . . . . . . . . . . 1 x 10
5
RAD(Si)
- Transient Upset . . . . . . . . . . . . . . . . >1 x 10
8
RAD(Si)/s
- Latch-up Free . . . . . . . . . . . . . . . . . >1 x 10
12
RAD(Si)/s
Low Standby Current . . . . . . . . . . . . . . . . . . . .500
μ
A Max
Low Operating Current. . . . . . . . . . 5.0mA/MHz (X
1
Input)
Electrically Equivalent to Sandia SA 3000
100% Software Compatible with INTEL 8085
Operation from DC to 2MHz, Post Radiation
Single 5V Power Supply
On-Chip Clock Generator and System Controller
Four Vectored Interrupt Inputs
Completely Static Design
Self Aligned Junction Isolated (SAJI) Process
Military Temperature Range. . . . . . . . . . . -55
o
C to 125
o
C
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(
o
C)
5962R9582401QQC
HS1-80C85RH-8
-55 to 125
5962R9582401QXC
HS9-80C85RH-8
-55 to 125
5962R9582401VQC
HS1-80C85RH-Q
-55 to 125
5962R9582401VXC
HS9-80C85RH-Q
-55 to 125
HS9-80C85RH/Proto
HS9-80C85RH/Proto
-55 to 125
Data Sheet
August 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
POSSIBLE SUBSTITUTE PRODUCT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
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