參數(shù)資料
型號(hào)： HMP8190CN
廠(chǎng)商： HARRIS SEMICONDUCTOR
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： NTSC/PAL Video Encoder
中文描述： COLOR SIGNAL ENCODER, PQFP64
文件頁(yè)數(shù)： 18/32頁(yè)
文件大?。?/td> 227K
代理商： HMP8190CN
18
TABLE 24. CLOSED CAPTION_284A DATA REGISTER
SUB ADDRESS = 12
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
LSB Data
This register is cascaded with the closed caption_284B data register and they are read out se-
rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A
data register is shifted out first.
80
H
TABLE 25. CLOSED CAPTION_284B DATA REGISTER
SUB ADDRESS = 13
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
MSB Data
This register is cascaded with the closed caption_284A data register and they are read out se-
rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A
data register is shifted out first.
80
H
TABLE 26. WSS_20A DATA REGISTER
SUB ADDRESS = 14
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 20
WSS LSB Data
This register is cascaded with the WSS_20B data register and they are read out serially as 14
bits during line 17, 20, or 23 if WSS is enabled. Bit D0 of the WSS_20A data register is shifted
out first.
00
H
TABLE 27. WSS_20B DATA REGISTER
SUB ADDRESS = 15
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 6
Reserved
00
B
5 - 0
Line 20
WSS MSB Data
This register is cascaded with the WSS_20A data register and they are read out serially as 14
bits during line 17, 20, or 23 if WSS is enabled. Bit D0 of the WSS_20A data register is shifted
out first.
000000
B
TABLE 28. WSS_283A DATA REGISTER
SUB ADDRESS = 16
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 283
WSS LSB Data
This register is cascaded with the WSS_283B data register and they are read out serially as
14 bits during line 280, 283, or 336 if WSS is enabled. Bit D0 of the WSS_283A data register
is shifted out first.
00
H
TABLE 29. WSS_283B DATA REGISTER
SUB ADDRESS = 17
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 6
Reserved
00
B
5 - 0
Line 283
WSS MSB Data
This register is cascaded with the WSS_283A data register and they are read out serially as
14 bits during line 280, 283, or 336 if WSS is enabled. Bit D0 of the WSS_283A data register
is shifted out first.
000000
B
HMP8190, HMP8191
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