參數(shù)資料
型號: HMP8190CN
廠商: HARRIS SEMICONDUCTOR
元件分類: 顏色信號轉換
英文描述: NTSC/PAL Video Encoder
中文描述: COLOR SIGNAL ENCODER, PQFP64
文件頁數(shù): 13/32頁
文件大小: 227K
代理商: HMP8190CN
13
TABLE 11. CONTROL REGISTER NAMES
SUB ADDRESS
(HEX)
CONTROL REGISTER
RESET
CONDITION
00
01
02
03
04
05
06
07
08-0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A-1F
20
21
22
23
24
25
26
27
28-2F
30-6A
6B-6F
70-7F
product ID
output format
input format
video processing
timing I/O 1
timing I/O 2
VBI data enable
VBI data input
reserved
host control 1
host control 2
caption_21A
caption_21B
caption_284A
caption_284B
WSS_20A
WSS_20B
WSS_283A
WSS_283B
CRC_20
CRC_283
reserved
start h_blank low
start h_blank high
end h_blank
start v_blank low
start v_blank high
end v_blank
field control 1
field control 2
reserved
test and unused
phase increment
test and unused
-
00
H
06
H
80
H
00
H
00
H
00
H
00
H
-
1E
H
00
H
80
H
80
H
80
H
80
H
00
H
00
H
00
H
00
H
3F
H
3F
H
-
4A
H
03
H
7A
H
03
H
01
H
13
H
00
H
00
H
-
-
-
-
FIGURE 10. I
2
C SERIAL TIMING FLOW
FIGURE 11. REGISTER WRITE PROGRAMMING FLOW
SDA
SCL
START
CONDITION
S
1-7
ADDRESS
8
R/W
9
ACK
1-7
DATA
8
9
ACK
STOP
CONDITION
P
A
A
S
CHIP ADDR
SUB ADDR
DATA
DATA
A
A
P
S = START CYCLE
P = STOP CYCLE
A = ACKNOWLEDGE
NA = NO ACKNOWLEDGE
FROM MASTER
FROM ENCODER
0x40 OR
0x42
DATA WRITE
DATA
DATA
DATA READ
REGISTER
POINTED
TO BY
SUBADDR
REGISTER
POINTED
TO BY
SUBADDR
0x41 OR
0x43
P
NA
A
A
CHIP ADDR
S
A
SUB ADDR
A
CHIP ADDR
S
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
0x40 OR
0x42
HMP8190, HMP8191
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