參數(shù)資料
型號(hào)： HMP8117CN
廠商： INTERSIL CORP
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： NTSC/PAL Video Decoder
中文描述： COLOR SIGNAL DECODER, PDSO80
封裝： PLASTIC, MS-022GB-1, MQFP-80
文件頁(yè)數(shù)： 32/45頁(yè)
文件大?。?/td> 269K
代理商： HMP8117CN
32
TABLE 38. VIDEO GAIN ADJUST REGISTER
SUB ADDRESS = 1D
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Video Gain Adjust
This register is enabled by the selection of “fixed gain control” mode in the Analog Input Control
register 05
H
bits 7-4. The value of this register selects a combined analog attenuation and a
digital gain factor which is applied to both Luma and Chroma input channels. The gain factor is
selected from nonlinear lookup table and may range in value from 0.5x (CE
H
) to 1.99x (33
H
).
Refer to Table 39 below. The Register Values in italics below mark the approximate analog
attenuation ladder switching points.
80
H
TABLE 39. VIDEO GAIN REGISTER LOOKUP TABLE
Video
Gain
Reg.
Value
Video
Gain
Reg.
Value
Video
Gain
Reg.
Value
Video
Gain
Reg.
Value
Video
Gain
Reg.
Value
Video
Gain
Reg.
Value
0.50
0.51
0.52
0.53
0.54
0.55
206/CEH
202/CA
H
197/C5
H
193/C1
H
191/BF
H
187/BB
H
0.67
0.68
0.69
0.70
0.71
0.72
153/99
H
151/97
H
150/96H
147/93
H
145/91
H
143/8F
H
0.84
0.85
0.86
0.87
0.88
0.89
123/7B
H
121/79
H
119/77
H
118/76
H
117/75
H
115/73H
1.03
1.04
1.05
1.06
1.07
1.08
100/64
H
99/63
H
98/62
H
97/61
H
96/60
H
95/5F
H
1.23
1.25
1.27
1.28
1.30
1.31
83/53
H
82/52
H
81/51
H
80/50
H
79/4F
H
78/4E
H
1.55
1.57
1.59
1.63
1.65
1.67
66/42
H
65/41
H
64/40
H
63/3F
H
62/3E
H
61/3D
H
0.56
0.57
0.58
0.59
0.60
0.61
183/B7
H
180/B4
H
178/B2
H
174/AE
H
171/AB
H
169/A9
H
0.73
0.74
0.75
0.76
0.77
0.78
141/8D
H
139/8B
H
137/89
H
136/88
H
134/86
H
132/84H
0.90
0.91
0.92
0.94
0.95
0.96
114/72
H
113/71
H
111/6F
H
110/6E
H
109/6D
H
107/6B
H
1.09
1.10
1.12
1.13
1.14
1.15
94/5E
H
93/5D
H
92/5C
H
91/5B
H
90/5A
H
89/59
H
1.33
1.34
1.37
1.38
1.40
1.42
77/4DH
76/4C
H
75/4B
H
74/4A
H
73/49
H
72/48
H
1.70
1.73
1.76
1.79
1.82
1.86
60/3C
H
59/3BH
58/3A
H
57/39
H
56/38
H
55/37
H
0.62
0.63
0.64
0.65
0.66
167/A7
H
164/A4
H
161/A1
H
159/9F
H
156/9C
H
0.79
0.80
0.81
0.82
0.83
130/82
H
128/80
H
126/7E
H
125/7D
H
124/7C
H
0.97
0.98
1.00
1.01
1.02
106/6A
H
104/68
H
103/67
H
102/66
H
101/65H
1.16
1.18
1.20
1.21
1.22
88/58H
87/57
H
86/56
H
85/55
H
84/54
H
1.44
1.46
1.48
1.51
1.52
71/47
H
70/46
H
69/45
H
68/44H
67/43
H
1.89
1.93
1.97
1.99
54/36
H
53/35
H
52/34
H
51/33H
TABLE 40. SHARPNESS ADJUST REGISTER
SUB ADDRESS = 1E
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-6
Reserved
00
B
5-0
Sharpness
Adjust
Specifies the amount of high frequency gain control for luminance signals (either 2.6MHz or
F
SC
), as determined by the Luma Processing register 08
H
. The gain ranges from +12dB (11
1111
B
) to -12dB (00 0100
B
). A value of 0dB (“01 0000”) has no effect on the data.
010000
B
HMP8117
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