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參數(shù)資料
| 型號(hào)： | HMP8116 |
| 廠商： | Intersil Corporation |
| 英文描述： | NTSC/PAL Video Decoder |
| 中文描述： | NTSC / PAL視頻解碼器 |
| 文件頁數(shù)： | 6/43頁 |
| 文件大小： | 182K |
| 代理商： | HMP8116 |
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6
VERTICAL SYNC AND FIELD DETECTION
The vertical sync and field detect circuit uses a low time
counter to detect the vertical sync sequence in the video
data stream. The low time counter accumulates the low time
encountered during any sync pulse, including serration and
equalization pulses. When the low time count exceeds the
vertical sync detect threshold, VSYNC is asserted immedi-
ately. FIELD is asserted at the same time that VSYNC is
asserted. FIELD is asserted low for odd fields and high for
even fields. Field is determined from the location in the video
line where VSYNC is detected. If VSYNC is detected in the
first half of the line, the field is odd. If VSYNC is detected in
the second half of a line, the field is even.
In the case of lost vertical sync or excessive noise that would
prevent the detection of vertical sync, the FIELD output will con-
tinue to toggle. Lost vertical sync is declared if after 337 lines, a
vertical sync period was not detected for 1 or 3 (selectable) suc-
cessive fields as specified by bit 2 of the GENLOCK CONTROL
register 04
H
. When this occurs, the PLLs are initialized to the
acquisition state.
Y/C SEPARATION
A composite video signal has the luma (Y) and chroma (C)
information mixed in the same video signal. The Y/C separa-
tion process is responsible for separating the composite
video signal into these two components. The HMP8116 uti-
lizes a comb filter to minimize the artifacts that are associ-
ated with the Y/C separation process.
INPUT SAMPLE RATE CONVERTER
The input sample rate converter is used to convert video
data sampled at the CLK2 rate to a virtual 4xf
SC
sample rate
for comb filtering and color demodulation. An interpolating
filter is used to generate the 4xf
SC
samples as illustrated in
Figure 3.
COMB FILTER
A 2-line comb filter, using a single line delay, is used to per-
form part of the Y/C separation process. During S-video
operation, the Y signal bypasses the comb filter; the C signal
is processed by the comb filter since it is an integral part of
the chroma demodulator. During PAL operation, the chroma
trap filter should also be enabled for improved performance.
Since a single line store is used, the chroma will normally
have a half-line vertical offset from the luma data. This may
be eliminated, vertically aligning the chroma and luma sam-
ples, at the expense of vertical resolution of the luma. Bit 0 of
the OUTPUT FORMAT register 02
H
controls this option.
CHROMA DEMODULATION
The output of the comb filter is further processed using a
patented frequency domain transform to complete the Y/C
separation and demodulate the chromanance.
Demodulation is done at a virtual 4xf
SC
sample rate using
the interpolated data samples to generate U and V data. The
demodulation process decimates by 2 the U/V sample rate.
OUTPUT SAMPLE RATE CONVERTER
The output sample rate converter converts the Y, U and V
data from a virtual 4xf
SC
sample rate to the desired output
sample rate (i.e., 13.5MHz). It also vertically aligns the sam-
ples based on the horizontal sync information embedded in
the digital video data stream. The output sample rate is
determined by the selected video standard and whether
square or rectangular pixels are output. The output format is
4:2:2 for all modes except the RGB modes which use a 4:4:4
output format.
CLK2 INPUT
Note that the color subcarrier is derived from CLK2. Any jitter
on CLK2 will be transferred to the color subcarrier, resulting
in color changes. Thus, CLK2 should be derived from a sta-
ble clock source, such as a crystal. The use of a PLL to gen-
erate CLK2 is not recommended. CLK2 must have a 50ppm
accuracy and at least a 60/40% duty cycle to ensure proper
operation.
The CLK2 clock rate must be one of the following frequen-
cies:
24.54MHz
27.00MHz
29.50MHz
The frequency of CLK2 must be 2x the desired output sam-
ple rate. The values in table 1 below indicate the CLK2 clock
rate based on the video standard and pixel mode. The out-
put sample rate for the given video standard and pixel mode
is half the CLK2 clock rate.z
TIME
INCOMING VIDEO SAMPLES
TIME
RESAMPLED VIDEO
4xf
SC
FIGURE 3. SAMPLE RATE CONVERSION
TABLE 1. VIDEO STANDARD CLOCKRATE SELECTION
SUMMARY
VIDEO FORMAT
ALLOWABLE CLK2
FREQUENCIES (MHz)
RECTANGULAR
PIXEL MODE
SQUARE
PIXEL MODE
(M) NTSC
27.00
24.54
(B, D, G, H, I, N) PAL
27.00
29.50
(M) PAL
27.00
24.54
(N
C
) PAL
27.00
29.50
HMP8116
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PDF描述 |
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| HMP8117CN | NTSC/PAL Video Decoder |
| HMP8154 | NTSC/PAL Encoders |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMP8116CN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Decoder |
| HMP8117 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Decoder |
| HMP8117_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Decoder |
| HMP8117CN | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 80PQFP,0+70C NTSC/PAL VIDEO DECODER W/MA RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| HMP8117CN96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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