32
TABLE 26. RAW VBI STOP COUNT_LSB REGISTER
SUB ADDRESS = 13
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-0
RawVBIStopCount
LSB
This register contains the LSBs of the count specifying where to stop generating raw VBI
data in two sample clock steps from the 50% point of the leading edge of HSYNC.
4A
H
TABLE 27. RAW VBI STOP COUNT_MSB REGISTER
SUB ADDRESS = 14
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-2
Reserved
000000
B
1-0
RawVBIStopCount
MSB
This register contains the MSBs of the count specifying where to stop generating raw VBI
data in two sample clock steps from the 50% point of the leading edge of HSYNC.
11
B
TABLE 28. RAW VBI LINE MASK_7_0 REGISTER
SUB ADDRESS = 15
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Raw VBI Line
Mask_7_0
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 9 (odd field) and 272 (even field) for 525 line systems and to line
5 (odd field) and 318 (even field) for 625 line systems. Bit 7 corresponds to line 16 (odd
field) and 279 (even field) for 525 line systems and to line 12 (odd field) and 325 (even
field) for 625 line systems.
FE
H
TABLE 29. RAW VBI LINE MASK_15_8 REGISTER
SUB ADDRESS = 16
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Raw VBI Line
Mask_15_8
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 17 (odd field) and 280 (even field) for 525 line systems and to
line 13 (odd field) and 326 (even field) for 625 line systems. Bit 7 corresponds to line 24
(odd field) and 287 (even field) for 525 line systems and to line 20 (odd field) and 333
(even field) for 625 line systems.
1F
H
TABLE 30. RAW VBI LINE MASK_18_16 REGISTER
SUB ADDRESS = 17
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-3
Reserved
00000
B
2-0
Raw VBI Line
Mask_18_16
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 25 (odd field) and 288 (even field) for 525 line systems and to
line 21 (odd field) and 334 (even field) for 625 line systems. Bit 2 corresponds to line 27
(odd field) and 290 (even field) for 525 line systems and to line 23 (odd field) and 336
(even field) for 625 line systems.
000
B
HMP8116