31
TABLE 23. INTERRUPT STATUS REGISTER
SUB ADDRESS = 10
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7
Genlock Loss
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that genlock was lost. To clear
the interrupt request, a “1” must be written to this bit.
0
B
6
Input Signal Loss
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that the input video source is no
longer present. To clear the interrupt request, a “1” must be written to this bit.
0
B
5
Closed Caption
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that the Caption_ODD_A and
Caption_ODD_B or the Caption_EVEN_A and Caption_EVEN_B data registers contain
new data. To clear the interrupt request, a “1” must be written to this bit.
0
B
4
WSS
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that the WSS_ODD_A and
WSS_ODD_BortheWSS_EVEN_AandWSS_EVEN_Bdataregisterscontainnewdata.
To clear the interrupt request, a “1” must be written to this bit.
0
B
3
Teletext
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that teletext data has been de-
tected in the current field. To clear the interrupt request, a “1” must be written to this bit.
0
B
2
Reserved
0
B
1
Auto Detect
Video Standard
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that the video standard has been
automatically determined. To clear the interrupt request, a “1” must be written to this bit.
0
B
0
Vertical Sync
Interrupt Status
If this bit is a “1”, the reason for the interrupt request was that a new field was started. To
clear the interrupt request, a “1” must be written to this bit.
0
B
TABLE 24. RAW VBI CONTROL REGISTER
SUB ADDRESS = 11
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-4
Reserved
0000
B
3
RAW Preamble En-
able
If this bit is a “1”, the RAW VBI data stream will have a preamble consisting of four bytes.
Which are FF
H
, CNT1, CNT2 and 00H. Where CNT1 = even parity bar, even parity[5-0],
0, Field (0=Odd, 1=Even), linecount[8-4] and CNT2 = even parity bar, even parity [5-
0],0,0,linecount[3-0].
0
B
2
RAW VBI All
If this bit is a “1”, all the video lines excluding the lines used for equalization and serration
pulses are converted to RAW VBI data.
If this bit is a “0”, only the lines enbled in the RAW VBI LINE MASK registers are converted
to RAW VBI data.
0
B
1
RAW VBI Even
Field
If this bit is a “1”, the even field lines are converted to RAW VBI data as specified by the
RAW VBI All bit and the RAW VBI Line Mask registers.
If this bit is a “0”, the even field lines are not included in the lines to be converted to RAW
VBI data.
0
B
0
RAW VBI Odd Field
If this bit is a “1”, the odd field lines are converted to RAW VBI data as specified by the
RAW VBI All bit and the RAW VBI Line Mask registers.
If this bit is a “0”, the odd field lines are not included in the lines to be converted to RAW
VBI data.
0
B
TABLE 25. RAW VBI START COUNT REGISTER
SUB ADDRESS = 12
H
BIT
NO.
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Raw VBI Start
Count
Specifies where to start generating raw VBI data in two sample clock steps from the 50%
point of the leading edge of HSYNC.
7A
H
HMP8116