參數(shù)資料
型號: HIP5061DS
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
中文描述: 12 A SWITCHING REGULATOR, 290 kHz SWITCHING FREQ-MAX, PZFM7
封裝: STAGGERED GULL WING, TO-220, SIP-7
文件頁數(shù): 20/20頁
文件大?。?/td> 158K
代理商: HIP5061DS
7-72
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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http://www.intersil.com
HIP5061
Both the SEPIC and the Boost topologies may be operated
at high voltages with the addition of a high voltage cascode .
Figure 42 shows the Cascode SEPIC converter that is
essentially limited by the selection of the external power
transistor. The burden of voltage, and power is placed upon
the external transistor. The HIP5061 still performs the drain
current sampling and the control function is the same as the
non cascode configuration.
FIGURE 42. OFF LINE CASCODE SEPIC
Figure 43 shows the voltage transfer as a function of duty
cycle for the power supply topologies discussed.
FIGURE 43. VOLTAGE TRANSFER AS A FUNCTION OF DUTY
CYCLE FOR VARIOUS TOPOLOGIES
HIP5061
GND
GATE DRIVER
AND CONTROL
CIRCUITRY
V
DD
V
G
DRAIN
FB
V
C
SOURCE
160V
V
IN
V
OUT
+
+
-
-
100
10
1
0.1
0.01
0
0.1
0.2
0.3
0.4
DUTY CYCLE (D)
0.5
0.6
0.7
0.8
0.9
1
M
O
/
I
BUCK-BOOST, CUK AND SEPIC
M = D/(1-D)
M = 1/(1 - D) BOOST
QUADRATIC
M = D
/(1 - D)
2
BUCK
M = D
References
[1]
Cassani, John C.; Hurd, Jonathan J. and Thomas, David
R., Wittlinger, H.A.; Hodgins, Robert G.;
Control IC Enhances 1MHz Current Controlled Regulator
Performance High Frequency Power Conversion (HFPC)
conference proceedings, May 1992, pp. 167-173
[2]
Smith, Craig D. and Cassani, Distributed Power Systems Via
ASICs Using SMT Surface Mount Technology, October 1990
Sophisticated
[3]
Maksimovic and Cuk, Switching Converters With Wide DC
Conversion Range High Frequency Power Conversion
(HFPC) conference record, May 1989
[5]
Maksimovic and Cuk, General Properties and Synthesis of
PWM DC-to-DC Converters IEEE Power Electronics
Specialists Conference (PESC) record, June 1989
[6]
Sokal and Sokal, Class E - A New Class of High Efficiency
Tuned Single-Ended Switching Power Amplifiers IEEE
Journal of Solid-State Circuits, June 1975, pp. 168-176
[7]
Mansmann, Jeff; Shafer, Peter and Wildi, Eric, Maximizing
the Impact of Power ICs Via a Time-to-Market CAD Driven
Power ASIC Strategy Applied Power and Electronics
Conference and Exposition (APEC) proceedings, Febru-
ary 1992, pp. 23-27
[8]
Severns and Bloom, Modern DC-to-DC Switchmode
Power Converter Circuits Van Nostrand Reinhold, 1985
[9]
Sum, K., Switch Mode Power Conversion - Basic Theory
and Design Marcel Dekker, In., 1984
[10]
Pressman, A., Switching and Linear Power Supply,
Power Converter Design Hayden Book Co., 1977
[11]
Massey, R.P. and Snyder, E.C., High Voltage Single-
Ended DC-DC Converter IEEE Power Electronics Spe-
cialists Conference (PESC) record, 1977, pp. 156-159
[12]
Clarke, P., A New Switched-Mode Power Conversion
Topology Provides Inherently Stable Response POWER-
CON 10 proceedings, March 1983, pp. E2-1 through E2-7
[13]
Intersil Application Notes AN9208 and AN9212.1
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