參數(shù)資料
型號: HFA3861A
廠商: Intersil Corporation
元件分類: 基帶處理器
英文描述: Direct Sequence Spread Spectrum Baseband Processor(直接序列擴頻基帶處理器)
中文描述: 直接序列擴頻基帶處理器(直接序列擴頻基帶處理器)
文件頁數(shù): 29/36頁
文件大?。?/td> 279K
代理商: HFA3861A
29
CONFIGURATION REGISTER ADDRESS 36 (48h) R/W SCRAMBLER SEED LONG PREAMBLE
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
Scrambler seed for long preamble
bit 3 of CR5 selects CR36 or CR 37
CONFIGURATION REGISTER ADDRESS 37 (4Ah) R/W SCRAMBLER SEED SHORT PREAMBLE
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
Scrambler seed for short preamble
bit 3 of CR5 selects CR36 or CR 37
CONFIGURATION REGISTER ADDRESS 38 (4Ch) R/W ED THRESHOLD
Bit 7
CR_AGC_EDmode.
0 = noise floor + CR_AGC_EDthresh
1 = absolute threshold
Bit 7:0
CR_AGC_EDthresh. Energy detect threshold, (range 0-127)
CONFIGURATION REGISTER ADDRESS 39 (4Eh) R/W CMF GAIN THRESHOLD
Bit 7:0
Channel Matched filter scale threshold (range 0-255). After CMF is in operation, 8 correlation peaks are accumulated and
compared to threshold to determine if there is headroom to scale gain up by a factor of 2. Set to 00h to disable scaling.
CONFIGURATION REGISTER ADDRESS 40 (50h) R/W RSSI ANTENNA THRESHOLD
Bit 7
Threshold. RSSI below this threshold will result in an antenna search.
0 = threshold is relative to noise floor
1 = threshold is absolute
Bits 6:0
Threshold for antenna decision (CR_AGC_AntSearchThresh), range 0-127
CONFIGURATION REGISTER ADDRESS 41 (52h) R/W PREAMBLE LEAD COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Preamble Lead Coefficient (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 42 (54h) R/W PREAMBLE LAG COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Preamble Lag Coefficient (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 43 (56h) R/W HEADER LEAD COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Header Lead Coefficient (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 44 (58h) R/W HEADER LAG COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Header Lag Coefficient (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 45 (5Ah) R/W DATA LEAD COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Data Lead Coefficient (0-4 range) (000000 - 100000)
CONFIGURATION REGISTER ADDRESS 46 (5Ch) R/W DATA LAG COEFFICIENT
Bit 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Data Lag Coefficient (0-4 range) (000000 - 100000)
HFA3861A
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HFA3861AIN 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processo
HFA3861AIN96 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processo
HFA3861B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3861BIN 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3861BIN96 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor