- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370499 > HDMP-1514 Fibre Channel Receiver Chipset(光纖通道接收芯片) PDF資料下載
參數(shù)資料
| 型號(hào)： | HDMP-1514 |
| 英文描述： | Fibre Channel Receiver Chipset(光纖通道接收芯片) |
| 中文描述： | 光纖信道接收芯片（光纖通道接收芯片） |
| 文件頁數(shù)： | 15/26頁 |
| 文件大?。?/td> | 284K |
| 代理商： | HDMP-1514 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
15
HDMP-1512 (Tx), Signal Definitions (cont’d.)
Symbol
LZPWRON
Signal Name
Laser Power On
Pin [36]
I/O
Input
Logic Type
TTL
Description
Used in conjunction with the dual loss of light
detectors and the OFC circuit to assure the system is
ready to power up the laser.
The capacitor connected to this pin will be pre-
charged at power-up. During operation, if the window
detector detects the laser bias to be out of range, this
capacitor will begin to discharge. If the condition lasts
long enough, the capacitor voltage will fall below the
fault level and the FAULT pin will go high. Nominal
fault level is <1.0 volts.
A high signal applied to this pin causes the transmitter
to clock the data in by alternating between data byte 0
on the rising edge of TBC and data byte 1 one half
clock cycle later. When this pin is low, both data bytes
are clocked in on the rising edge of TBC.
The signal on this pin is input directly to the internal
laser driver circuitry or the LOUT pin. This input is
selected with the proper setting of TS1, TS2 and
EWRAP (see Input/Output Select table).
High speed data output port. See Input/Output Select
table to enable this output.
LZTC
Laser Timing Cap
Pin [27]
C
PPSEL
Ping-Pong Select
Pin [34]
Input
TTL
±
SI
Laser External Serial
Input
Pins [11,12]
Input
H50
±
SO
Cable Serial Data
Output
Pins [5,6]
Serial Speed Select
Pin [67]
Transmit Byte Clock
Pin [73]
Output
BLL
SPDSEL
Input
TTL
Sets the chip to operate at the serial data rate of 1062.5
Mbaud (high) or 531.25 Mbaud (low).
A 53.125 Mhz clock supplied by the host system. This
reference clock is multiplied by 10 or 20 to generate
the serial bit clock (531.25 MHz or 1062.5 MHz).
TS1 and TS2 work in conjunction with EWRAP to
specify active input and output ports.
TBC
Input
TTL
TS[1:2]
Input/Output Select
Input
Pins [75,76]
Data Inputs
Pins [43:62]
Input
TTL
TX[00.19]
Input
TTL
Two, 10 bit, pre-encoded data bytes. Byte 0 is
comprised of bits TX[00:09] and byte 1 is comprised of
bits TX[10:19]. The serialized bit stream is
transmitted TX[00] through TX[09] then TX[10]
through TX[19].
Provides a clean power source for the critical PLL
and high speed analog cells. Normally +5.0 volts.
Provides a clean power source for the high speed
cells. Noise on this line should be minimized for best
performance. Normally +5.0 volts.
Provides a clean power source for the high speed
cells. Noise on this line should be minimized for best
performance. Normally +5.0 volts.
Used for all internal PECL logic. Isolate from the
noisy TTL supply. Normally +5.0 volts.
Power supply for low speed laser driver circuitry.
Normally +5.0 volts.
Power supply for all laser driver AC circuitry.
Normally +5.0 volts.
VCC_A
Analog Supply
Pins [77, 78]
High Speed Supply 1
Pin [7]
S
VCC_HS1
S
VCC_HS2
High Speed Supply 2
Pin [13]
S
VCC_LOG
Logic Power Supply
Pins [33,37,68,72]
Laser Power Supply
Pins [23,24]
Laser Power Supply
Pin [16]
S
VCC_LZ
S
VCC_LZ1
S
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HDMP-1526 | Transistor Diode Kit;Contents Of Kit:Transistor/Diode Kit |
| HDMP-1536 | Fibre Channel Transceiver Chip |
| HDMP-1546 | Fibre Channel Transceiver Chip |
| HDMP-1546A | Fibre Channel Transceiver Chip(光纖通道收發(fā)器芯片) |
| HDMP-1536A | Fibre Channel Transceiver Chip(光纖通道收發(fā)器芯片) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDMP1526 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| HDMP-1526 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transceiver Chip |
| HDMP-1536 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transceiver Chip |
| HDMP-1536A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fiber-Optic Transceiver |
| HDMP-1546 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transceiver Chip |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。