參數(shù)資料
型號(hào)： HDMP-0440
英文描述： Voltage Regulator IC; Output Current:100mA; Output Voltage:6.2V; Package/Case:3-TO-92; Voltage Regulator Type:Positive Voltage; Mounting Type:Through Hole; Supply Voltage:35V
中文描述： 四端口旁路電路的光纖通道仲裁環(huán)路
文件頁(yè)數(shù)： 6/10頁(yè)
文件大?。?/td> 271K
代理商： HDMP-0440
6
AC Electrical Specifications
T
A
= 0
°
C to +70
°
C, V
CC
= 3.15 V to 3.45 V.
Symbol
Parameter
T
LOOP_LAT
Total Loop Latency from FM_NODE[0] to TO_NODE[0]
T
CELL_LAT
Per Cell Latency from FM_NODE[4] to TO_NODE[0]
t
r,LVTTLin
Input LVTTL Rise Time Requirement, 0.8 V to 2.0 V
t
f,LVTTLin
Input LVTTL Fall Time Requirement, 2.0 V to 0.8 V
t
r,LVTTLout
Output TTL Rise Time, 0.8 V to 2.0 V, 10 pF Load
t
f,LVTTLout
Output TLL Fall Time, 2.0 V to 0.8 V, 10 pF Load
t
rs,HS_OUT
HS_OUT Single-Ended Rise Time, 20% to 80%
t
fs,HS_OUT
HS_OUT Single-Ended Fall Time, 20% to 80%
t
rd,HS_OUT
HS_OUT Differential Rise Time, 20% to 80%
t
fd,HS_OUT
HS_OUT Differential Fall Time, 20% to 80%
V
IP,HS_IN
HS_IN Required Pk-Pk Differential Input Voltage
V
OP,HS_OUT
HS_OUT Pk-Pk Differential Output Voltage (Z0 = 75
, Figure 6)
Units
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
mV
mV
Min.
Typ.
2.0
0.8
2.0
2.0
1.7
1.7
200
200
200
200
1200
1400
Max.
3.3
2.4
30
300
300
30
2000
2000
200
1100
Guaranteed Operating Rates
T
A
= 0
°
C to +70
°
C, V
CC
= 3.15 V to 3.45 V.
FC Serial Clock Rate (MBd)
Min.
Max.
1,040
1,080
GE Serial Clock Rate (MBd)
Min.
1,240
Max.
1,260
Figue 4. Eye diagram of TO_NODE[1]
±
high speed differential output (50
termination).
Note: Measurement taken with a 2
7
-1 PRBS input to FM_NODE[1]
±
.
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