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參數(shù)資料
| 型號(hào)： | HDM8515P |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | Operational Amplifier (Op-Amp) IC; Number of Amplifiers:4; Package/Case:14-DIP; Op Amp Type:Low Power; Single Supply Voltage Min (+V):3V; Dual Supply Voltage Max (+/- V):16V; Amplifier Type:Operational; Mounting Type:Through Hole |
| 中文描述： | 的DVB /決策支持系統(tǒng)兼容接收器 |
| 文件頁(yè)數(shù)： | 58/75頁(yè) |
| 文件大小： | 272K |
| 代理商： | HDM8515P |
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58
1F
Bit 7.
This bit should be fixed to zero.
Unused
Wideband AGC threshold
Bits [5:0]. Wideband AGC threshold
It determines the threshold of wide band AGC accumulator. This value
controls the magnitude of ADC input.
Bit 6. Unused
Bit 7. Wideband AGC Frequency down
It regulates wide band AGC frequency. When this bit is set to zero,
system clock for wide band AGC frequency is sampling clock.
Otherwise, system clock for wide band AGC frequency become sixteen
times of sampling clock frequency.
Scaling factor
Bits [2:0]. Scaling factor
This value manages to scale the soft decision demodulator outputs to
the proper levels for the 4 bit soft decision Viterbi inputs. If an overflow is
detected, the output is limited to maximum or minimum 6 bit values.
The upper four bits of this result are passed to the Viterbi decoder.
00H
QPSK output
01H
QPSK output * 1.25
02H
QPSK output * 1.5
03H
QPSK output * 1.75
04H
QPSK output * 2.00
05H
QPSK output * 2.25
06H
QPSK output * 2.5
07H
QPSK output * 2.75
20
21
22
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