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參數(shù)資料
| 型號： | HDM8515P |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | Operational Amplifier (Op-Amp) IC; Number of Amplifiers:4; Package/Case:14-DIP; Op Amp Type:Low Power; Single Supply Voltage Min (+V):3V; Dual Supply Voltage Max (+/- V):16V; Amplifier Type:Operational; Mounting Type:Through Hole |
| 中文描述： | 的DVB /決策支持系統(tǒng)兼容接收器 |
| 文件頁數(shù)： | 45/75頁 |
| 文件大?。?/td> | 272K |
| 代理商： | HDM8515P |
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5.3 Monitor and Control Interface
Three different modes are supported for the monitor and control interface. Two of the modes are 8
bit parallel interfaces, one which supports Intel microcontrollers and the other intended for Motorola
microcontrollers. The third mode is a serial interface conforming to the I2C standard.
The I2C mode is activated by placing BUSMODE high at the same time both /RE and /WE are low
simultaneously. When this mode is active, the seven bit I2C slave address of the HDM8515 is
configured by the seven least significant bits of the HI_DATA[7:0] bus.
HI_DATA [7:0]
This bi-directional data bus is used for transferring control parameters to
the demodulator and for reading the status registers within the
demodulator.
/CE
Chip enable is an active low input to the demodulator which signifies that
the other control signals are active.
/RE
Read Enable is an active low input to the device which, when active at the
same time chip enable is true, permits the device to drive the HI_DATA
[7:0] lines. When BUSMODE is 0 (Motorola), this pin is read / not write
(see timing diagrams).
/WE
Write enable is an active low input to the device which, when true at the
same time chip enable is true, causes input data on the HI_DATA [7:0] bus
to be transferred to the register defined by the HI_ADDR [4:0] bus. When
BUSMODE is 0 (Motorola), this pin is not data strobe (see timing
diagrams).
HI_ADDR [4:0]
The address bus defines which location within the device is to be accessed
during a read or write operation.
BUSMODE
chip. When high, an Intel processor/microcontroller interface is used.
When low, a Motorola processor interface is used.
DTACK
the HDM8515.
SCL_I2C
SDA_I2C
This pin is the data for the I2C interface and requires an external pull-up
resistor as per the I2C standard.
SDA_I2CO
This pin, which can be by-passed, is the data for the I2C interface.
SCL_I2CO
This pin, which can be by-passed, provides the clock for the I2C interface.
BUSMODE selects the type of microcontroller/processor used to setup the
Data Acknowledge/Data Ready is a tristate output signal which informs
the controlling processor that a data transfer has been acknowledged by
This pin provides the clock for the I2C interface when that mode is active.
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