參數(shù)資料
型號: HD66728
廠商: Hitachi,Ltd.
英文描述: 112 x 80-dot Graphics LCD Controller/Driver(112 x 80點圖形LCD控制器)
中文描述: 112 × 80點圖形LCD控制器/驅(qū)動器(112 × 80點圖形液晶顯示控制器)
文件頁數(shù): 91/138頁
文件大?。?/td> 2158K
代理商: HD66728
HD66728
91
CGROM Bank Switching Function
The HD66728 incorporates two pages of CGROM. Switching the memory bank in a display line unit using
the CGROM bank switching bits (RL1 to RL10) can display a total of 432 font patterns. Since each
display line switches memory bank 0/1, the number of fonts which can be displayed in the same display
line is 240 CGROMs + 16 CGRAMs when memory bank 0 is selected, and 192 CGROMs + 64 CGRAMs
when memory bank 1 is selected. Font displays for CGRAMs (1) to (16) are used in common with
memory bank 0 and memory bank 1.
With the number of fonts is extended, multinational fonts, special symbols, and icons can be displayed. In
addition, the character display mode can simply implement multiple displays: graphic pictograms or
graphic mark displays that use a one-line display, and menu bar displays by using the black-and-white
reversed fonts that are supported by the graphics display.
Table 34 RL Bit Setting
Bit Set Value Set RLn = 0
Set RLn = 1
RL1 bit
The first line is displayed by memory bank 0. The first line is displayed by memory bank 1.
RL2 bit
The second line is displayed by memory
bank 0.
The second line is displayed by memory
bank 1.
RL3 bit
The third line is displayed by memory bank
0.
The third line is displayed by memory bank
1.
RL4 bit
The fourth line is displayed by memory bank
0.
The fourth line is displayed by memory bank
1.
RL5 bit
The fifth line is displayed by memory bank 0. The fifth line is displayed by memory bank 1.
RL6 bit
The sixth line is displayed by memory bank
0.
The sixth line is displayed by memory bank
1.
RL7 bit
The seventh line is displayed by memory
bank 0.
The seventh line is displayed by memory
bank 1.
RL8 bit
The eighth line is displayed by memory bank
0.
The eighth line is displayed by memory bank
1.
RL9 bit
The ninth line is displayed by memory bank
0.
The ninth line is displayed by memory bank
1.
RL10 bit
The 10th line is displayed by memory bank
0.
The 10th line is displayed by memory bank
1.
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