
44 HITACHI
Software Standby Mode:
To enter the standby mode, set the standby bit SBY (in the standby
control register SBYCR) to 1 and execute a SLEEP instruction. In standby mode, all CPU, on-chip
peripheral module and oscillator functions are halted. CPU internal register contents and on-chip
RAM data are held.
To return from standby mode, use a reset or an external NMI interrupt. For resets, the CPU returns
to ordinary program execution state through the exception processing state when placed in a reset
state during oscillator stabilization time. For NMI interrupts, the CPU returns to ordinary program
execution state through the exception processing state after the oscillator stabilization time has
elapsed. In this mode, power consumption drops markedly, since the oscillator stops.
Table 2.19
Power-Down State
State
Mode
Conditions
Clock CPU
On-chip
Peripheral
Modules
CPU
Regi-
sters
RAM I/O Ports
Canceling
Sleep
mode
Execute SLEEP
instruction with
SBY bit cleared
to 0 in SBYCR
Run
Halt Run
Held
Held
Held
1. Interrupt
2. DMA address
error
3. Power-on
reset
4. Manual reset
Stand
by
mode
Execute SLEEP
instruction with
SBY bit set to 1
in SBYCR
Halt
Halt Halt and
initialize*
Held
Held
Held or
high-Z*
(selectable)
1. NMI
2. Power-on
reset
3. Manual reset
Note:
Differs depending on the peripheral module and pin.