參數(shù)資料
型號(hào): HCPL-7870
英文描述: Isolated 15-bit A/D Converter(隔離15位A/D轉(zhuǎn)換器)
中文描述: 隔離15位A / D轉(zhuǎn)換器(隔離15位的A / D轉(zhuǎn)換器)
文件頁數(shù): 22/30頁
文件大小: 344K
代理商: HCPL-7870
22
Conversion Mode
The conversion mode determines
the speed/resolution trade-off for
the Isolated A/D converter. The
four MSBs of registers 0 and 1
Table 4. Conversion Mode Configuration.
Configuration Data Bits
Bit 6
High
Low
High
High
Low
Mode
1
2
3
4
5
Bit 7
Low
Low
High
High
High
Bit 5
Low
High
High
Low
High
Bit 4
High
High
Low
Low
Low
Note:
Bold italic type indicates default values.
determine the conversion mode
for the appropriate channel. The
bit settings for choosing a partic-
ular conversion mode are shown
in Table 4 below. See Table 2 for
a summary of how performance
changes as a function of conver-
sion mode setting. Combinations
of data bits not specified in Table
4 below are not recommended.
Conversion
0
1
2
3
Table 3. Register Configuration.
Configuration Data Bits
Bit 5
Address Bits
Bit 1
Register
Bit 7
Bit 6
Bit 4
Bit 3
Channel 1
Offset Cal
Bit 2
Reserved
Bit 0
Channel 1 Conversion Mode
High
High
Low
Low
Low
Low
Reserved
Low
Low
Channel 2 Conversion Mode
Channel 2
Offset Cal
High
High
Low
Low
Threshold Level
Low
Low
Low
High
Threshold
Detection Time
High
Pre-Trigger Mode
Low
Low
Low
Low
Low
High
Low
Reserved
Low
Low
Low
Low
Low
Low
High
High
Note:
Bold italic type indicates default values. Reserved bits should be set low.
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