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參數(shù)資料
| 型號(hào)： | GS9062-CF |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer |
| 中文描述： | GS9062的HD - LINX進(jìn)程，商標(biāo)第二SD - SDI和DVB - ASI在內(nèi)串行器 |
| 文件頁數(shù)： | 28/46頁 |
| 文件大?。?/td> | 473K |
| 代理商： | GS9062-CF |
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GS9062 Data Sheet
22209 - 5
May 2005
28 of 46
3.6.3 Packet Generation and Insertion
In addition to input data blanking and automatic video standards detection, the
GS9062 may also calculate, assemble and insert into the data stream various
types of ancillary data packets and TRS ID words.
These features are only available when the device is set to operated in SMPTE
mode and the IOPROC_EN/DIS pin is set HIGH. Individual insertion features may
be enabled or disabled via the IOPROC_DISABLE register (
Table 3-5
).
All of the IOPROC_DISABLE register bits default to '0' after device reset, enabling
all of the processing features. To disable any individual error correction feature, the
host interface must set the corresponding bit HIGH in this register.
Table 3-5: Host Interface Description for Internal Processing Disable Register
Register Name
Bit
Name
Description
R/W
Default
IOPROC_DISABLE
Address: 00h
15-9
Not Used
8
H_CONFIG
Horizontal sync timing input configuration. Set LOW when
the H input timing is based on active line blanking (default).
Set HIGH when the H input timing is based on the H bit of
the TRS words. See
Figure 3-2
.
R/W
0
7
Not Used
6
352M_INS
SMPTE352M packet insertion. The IOPROC_EN/DIS pin
and SMPTE_BYPASS pin must also be set HIGH. Set HIGH
to disable.
R/W
0
5
ILLEGAL_REMAP
Illegal Code Remapping. Detection and correction of illegal
code words within the active picture area (AP). The
IOPROC_EN/DIS pin and SMPTE_BYPASS pin must also
be set HIGH. Set HIGH to disable.
R/W
0
4
EDH_CRC_INS
Error Detection & Handling (EDH) Cyclical Redundancy
Check (CRC) error correction. The IOPROC_EN/DIS pin
and SMPTE_BYPASS pin must also be set HIGH. Set HIGH
to disable.
R/W
0
3
ANC_CSUM_INS
Ancillary Data Checksum insertion. The IOPROC_EN/DIS
pin and SMPTE_BYPASS pin must also be set HIGH. Set
HIGH to disable.
R/W
0
2-1
Not Used
0
TRS_INS
Timing Reference Signal Insertion. Occurs only when
IOPROC_EN/DIS is HIGH and SMPTE_BYPASS is HIGH.
Set HIGH to disable.
R/W
0
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