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參數(shù)資料
| 型號： | GS9062-CF |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer |
| 中文描述： | GS9062的HD - LINX進(jìn)程，商標(biāo)第二SD - SDI和DVB - ASI在內(nèi)串行器 |
| 文件頁數(shù)： | 35/46頁 |
| 文件大?。?/td> | 473K |
| 代理商： | GS9062-CF |
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GS9062 Data Sheet
22209 - 5
May 2005
35 of 46
3.8 Serial Digital Data PLL
To obtain a clean clock signal for serialization and transmission, the input PCLK is
locked to an external reference signal via the GS9062's integrated phase-locked
loop. This PLL is also responsible for generating all internal clock signals required
by the device.
Internal division ratios for the locked PCLK are determined by the setting of the
20bit/10bit pin as shown in
Table 3-10
.
3.8.1 External VCO
The GS9062 requires the GO1525 external voltage controlled oscillator as part of
its internal PLL.
Power for the external VCO is generated entirely by the GS9062 from an integrated
voltage regulator. The internal regulator uses +3.3V supplied on the CP_VDD /
CP_GND pins to provide +2.5V on the VCO_VCC / VCO_GND pins.
The external VCO produces a reference signal for the PLL, input on the VCO pin
of the device. Both reference and control signals should be referenced to the
supplied VCO_GND as shown in the recommended application circuit of
Typical
Application Circuit on page 42
.
3.8.2 Lock Detect Output
The lock detect block controls the serial digital output signal and indicates to the
application layer the lock status of the device via the LOCKED output pin.
LOCKED will be asserted HIGH if and only if the internal data PLL has locked the
PCLK signal to the external VCO reference signal and one of the following is true:
1. The device is set to operate in SMPTE mode and has detected SMPTE TRS
words in the serial stream; or
2. The device is set to operate in DVB-ASI mode and has detected K28.5 sync
characters in the serial stream; or
3. The device is set to operate in Data-Through mode.
Table 3-10: Serial Digital Output Rates
20bit/10bit
Supplied PCLK Rate
Serial Digital
Output Rate
HIGH
13.5MHz
270Mb/s
LOW
27MHz
270Mb/s
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|---|---|
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相關(guān)代理商/技術(shù)參數(shù) |
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| GS9062-CFE3 | 制造商:Semtech Corporation 功能描述:Dual Standard Serializer 80-Pin LQFP 制造商:Semtech Corporation 功能描述:Transmitter for SD-SDI & DVB-ASI |
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| GS9064A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
| GS9064ACKDE3 | 制造商:Semtech Corporation 功能描述:Adaptive Cable Equalizer. High-speed BiCMOS integrated circuit. 16-Pin SOIC 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
| GS9064ACTDE3 | 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
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