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參數(shù)資料
| 型號(hào)： | GS9062-CF |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer |
| 中文描述： | GS9062的HD - LINX進(jìn)程，商標(biāo)第二SD - SDI和DVB - ASI在內(nèi)串行器 |
| 文件頁數(shù)： | 26/46頁 |
| 文件大?。?/td> | 473K |
| 代理商： | GS9062-CF |
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GS9062 Data Sheet
22209 - 5
May 2005
26 of 46
3.5 Data-Through Mode
The GS9062 may be configured by the application layer to operate as a simple
parallel-to-serial converter. In this mode, the device presents data to the output
buffer without performing any scrambling or encoding.
Data-through mode is enabled only when both the SMPTE_BYPASS and
DVB_ASI pins are set LOW.
3.6 Additional Processing Functions
The GS9062 contains an additional data processing block which is available in
SMPTE mode only,
SMPTE Mode on page 23
.
3.6.1 Input Data Blank
The video input data may be 'blanked' by the GS9062. In this mode, all input video
data except TRS words are set to the appropriate blanking levels by the device.
Both the horizontal and vertical ancillary data spaces will also be set to blanking
levels.
This function is enabled by setting the BLANK pin LOW.
3.6.2 Automatic Video Standard Detection
The GS9062 can detect the input video standard by using the timing parameters
extracted from the received TRS ID words or supplied H, V, and F timing signals
Internal Flywheel on page 23
. This information is presented to the host interface
via the VIDEO_STANDARD register (
Table 3-2
).
Total samples per line, active samples per line, total lines per field/frame and active
lines per field/frame are also calculated and presented to the host interface via the
RASTER_STRUCTURE registers (
Table 3-3
). These line and sample count
registers are updated once per frame at the end of line 12. This is in addition to the
information contained in the VIDEO_STANDARD register.
After device reset, the four RASTER_STRUCTURE registers default to zero.
Table 3-2: Host Interface Description for Video Standard Register
Register Name
Bit
Name
Description
R/W
Default
VIDEO_STANDARD
Address: 04h
15
Not Used
14–10
VD_STD[4:0]
Video Data Standard (see
Table 3-4
)
R
0
9
Not Used
8
STD_LOCK
Standard Lock: Set HIGH when flywheel has
achieved full synchronization.
R
0
7–0
Not Used
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS9062-CFE3 | GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer |
| GS9064-CKD | GS9064 SD SDI Adaptive Cable Equalizer |
| GS9064-CKDE3 | GS9064 SD SDI Adaptive Cable Equalizer |
| GS9064A | GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS9062-CFE3 | 制造商:Semtech Corporation 功能描述:Dual Standard Serializer 80-Pin LQFP 制造商:Semtech Corporation 功能描述:Transmitter for SD-SDI & DVB-ASI |
| GS9064 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| GS9064A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9064A HD-LINX㈢ II Adaptive Cable Equalizer |
| GS9064ACKDE3 | 制造商:Semtech Corporation 功能描述:Adaptive Cable Equalizer. High-speed BiCMOS integrated circuit. 16-Pin SOIC 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
| GS9064ACTDE3 | 制造商:Semtech Corporation 功能描述:SD/ASI Adaptive Equalizer |
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