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參數(shù)資料
| 型號： | GS4915 |
| 廠商： | Gennum Corporation |
| 英文描述： | CONN,S/R,8 POS,254C-08-1, CLOSED END STRAIN RELIEF COVER |
| 中文描述： | ClockCleaner⑩ |
| 文件頁數(shù)： | 5/26頁 |
| 文件大?。?/td> | 533K |
| 代理商： | GS4915 |
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GS4915 Data Sheet
39145 - 3
November 2007
5 of 26
1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Number
Name
Timing
Type
Description
1
REG_VDD
–
Power
Positive power supply connection for the internal voltage regulator.
Connect to filtered +3.3V DC.
2, 6, 9, 26,
30, 31, 40
AGND
–
Power
Ground connection for analog blocks and IO’s. Connect to clean analog
GND.
3
PD_VDD
–
Power
Positive power supply connection for the phase detector. Connect to
filtered +1.8V DC.
4, 5
CLKIN, CLKIN
–
Input
CLOCK SIGNAL INPUTS
Signal levels are CML/LVDS compatible.
A differential clock input signal is applied to these pins.
7
IN_VDD
–
Power
Positive power supply connection for the single-ended and differential
input clock buffers. Supplies CLKIN_SE. Connect to filtered +1.8V DC.
8
CLKIN_SE
–
Input
CLOCK SIGNAL INPUT
Signal levels are LVCMOS compatible.
A single-ended video clock input signal is applied to this pin.
10
RESET
Non
synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
See
Section 3.8.1
for operation.
11
IPSEL
Non
synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS compatible.
Selects which input clock is cleaned by the device.
See
Section 3.2.3
for operation.
12, 20, 22
GND
–
Power
Ground connection for digital blocks and IO’s. Connect to GND.
13
BYPASS
Non
synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS compatible.
See Manual Bypass
Section 3.4.2
.
14
AUTOBYPASS
Non
synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS compatible.
Selects the bypass mode of the device.
See Manual Bypass
Section 3.4.2
.
15
D_VDD
–
Power
Positive power supply connection for digital block. Connect to filtered
+1.8V DC. The digital block includes pins 10 - 21.
17, 16
FCTRL1, FCTRL0
Non
synchronous
Input
CONTROL SIGNAL INPUTS
Signal levels are LVCMOS compatible.
Selects the frequency mode of the device.
See
Section 3.4.1
for operation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS4915_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:ClockCleaner |
| GS4915-CNE3 | 制造商:Semtech Corporation 功能描述:QFN-40 pin (490/tray) |
| GS4915INE3 | 制造商:Gennum Corporation 功能描述:CLOCKCLEANER HD/SD VIDEO INPUT 40QFN 制造商:Gennum Corporation 功能描述:CLOCKCLEANER, HD/SD, VIDEO INPUT, 40QFN |
| GS4915-INE3 | 功能描述:IC CLK JITTER CLEANR 40QFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:ClockCleaner™ 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| GS4953 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:臺灣晶群科技 |
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