
*** 
Genesis Microchip Confidential ***
gm2115/25 Preliminary Data Sheet
June 2002 
3
C2115-DAT-01B
List Of Tables
Table 1. Analog Input Port.......................................................................................................8 
Table 2. RCLK PLL Pins.........................................................................................................8 
Table 3. System Interface and GPIO Signals...........................................................................9 
Table 4. Display Output Port.................................................................................................10 
Table 5. Parallel ROM Interface Port....................................................................................11 
Table 6. TCON Output Port...................................................................................................11 
Table 7. Reserved Pins...........................................................................................................11 
Table 8. Power Pins for ADC Sampling Clock DDS ............................................................13 
Table 9. Power Pins for Display Clock DDS.........................................................................13 
Table 10. I/O Power and Ground Pins.....................................................................................13 
Table 11. Core Power and Ground Pins...................................................................................13 
Table 12. TCLK Specification.................................................................................................18 
Table 13. Pin Connection for RGB Input with HSYNC/VSYNC...........................................21 
Table 14. ADC Characteristics................................................................................................22 
Table 15. gm2115/25 GPIOs and Alternate Functions............................................................43 
Table 16. Bootstrap Signals.....................................................................................................43 
Table 17. Instruction Byte Map...............................................................................................45 
Table 18. Absolute Maximum Ratings....................................................................................48 
Table 19. DC Characteristics...................................................................................................49 
Table 20. Maximum Speed of Operation.................................................................................50 
Table 21. Display Timing and DCLK Adjustments ................................................................50 
Table 22. 2-Wire Host Interface Port Timing..........................................................................50