參數(shù)資料
型號(hào)： GC3011-CQ
文件頁數(shù)： 12/34頁
文件大小： 194K
代理商： GC3011-CQ
GRAYCHIP,INC.
- 12 -
JULY 22, 1996
GC3011 DIGITAL RESAMPLER
This document contains information which may be changed at any time without notice
2.10
DIAGNOSTICS
An input ramp generator, a sync period generator, and a checksum generator are provided on the
chip in order to run diagnostic tests. Diagnostics are performed by turning on the ramp generator, enabling
the diagnostic syncs, letting the chip operate for at least 4 sync periods, reading the checksum and
comparing it to its predicted value. A new checksum is generated every sync period. The input ramp
sequence is the same for every sync period and the chip is re-initialized at the beginning of each sync period
so that each checksum should be the same once the chip’s data path has been flushed. The chip requires
at least 3 sync periods to flush, so the fourth and following checksums should be valid. The test is then
repeated for several different resampling ratios and mode settings.
The sync period is 2
20
clocks, or approximately 1 million clock cycles, so four sync periods will be
about 4 million clocks. This represents a delay of less than 70 milliseconds for a clock rate of 60 MHz.
The following table lists the expected checksums for four test configurations. All values are in HEX.
CONTROL REGISTER
TEST 1
TEST 2
TEST 3
TEST 4
TBD
EXPECTED CHECKSUMS
(REG 15)
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