參數(shù)資料
型號(hào)： FTS64K
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 50/MDR/RECP/VERT PRS FIT/M2.6/SCW/30 MIN
中文描述： 64K的快閃記憶體字節(jié)
文件頁(yè)數(shù)： 33/44頁(yè)
文件大?。?/td> 401K
代理商： FTS64K
33
Figure 4-2 Example Program Algorithm
Write: Register FCLKDIV
Read: Register FCLKDIV
Bit FDIVLD set
Write: Array Address and
Program Data
Write: Register FCMD
Program Command $20
Write: Register FSTAT
Clear bit CBEIF $80
yes
no
CBEIF
Set
Bit
yes
Clock Register
Written
Check
1.
2.
3.
Clear bit ACCERR $10
Write: Register FSTAT
no
yes
no
Protection
Violation Check
Access
Error Check
Read: Register FSTAT
CCIF
Set
Bit
no
no
Address, Data,
Command
Buffer Empty Check
Next Write
yes
EXIT
no
Clear bit PVIOL $20
Write: Register FSTAT
yes
PVIOL
Set
Bit
ACCERR
Set
Bit
Bit Polling for
Command
Completion Check
Read: Register FSTAT
yes
NOTE: command sequence
aborted by writing $00 to
FSTAT register.
NOTE: command sequence
aborted by writing $00 to
FSTAT register.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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