參數(shù)資料
型號: FTS64K
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 50/MDR/RECP/VERT PRS FIT/M2.6/SCW/30 MIN
中文描述: 64K的快閃記憶體字節(jié)
文件頁數(shù): 19/44頁
文件大?。?/td> 401K
代理商: FTS64K
19
The Flash module has hardware interlocks which protect data from accidental corruption. One protected
sector is located at the higher address end, just below $FFFF. Another protected sector is located at the
lower address end, just after the beginning of the Flash code implementation at address $4000. Both the
high and low address protected sectors in the Flash can be sized from 512 bytes to 4K bytes. The middle
Flash page can also exhibit protectable areas as indicated in the memory map summary
Table 3-2
.
The NVM module also contains a set of 16 control and status registers located in address space BASE +
$100 to BASE + $10F. A summary of these registers is given in
Table 3-3
.
Table 3-3 FTS64K Memory Map
NOTE:
Register Address = Base Address + Address Offset, where the Base Address is
defined at the MCU level and the Address Offset is defined at the module level
.
3.3 Register Descriptions
3.3.1 FCLKDIV — Flash Clock Divider Register
The FCLKDIV register is used to control timed events in program and erase algorithms.
Address
Offset
$_00
$_03
Use
Access
Flash Clock Divider Register (FCLKDIV)
Flash Security Register (FSEC)
RESERVED1
1
Flash Configuration Register (FCNFG)
Flash Protection Register (FPROT)
Flash Status Register (FSTAT)
Flash Command Register (FCMD)
RESERVED2
2
RESERVED3
3
RESERVED4
4
RESERVED5
5
RESERVED6
6
R/W
R
$_02
NOTES
:
1. RESERVED2 intended for factory test purposes only.
2. RESERVED3 intended for factory test purposes only.
3. RESERVED4 intended for factory test purposes only.
4. RESERVED5 intended for factory test purposes only.
5. RESERVED6 intended for factory test purposes only.
6. RESERVED7 intended for factory test purposes only.
R
$_03
$_04
$_05
$_06
R/W
R/W
R/W
R/W
$_07
R
$_08
R
$_09
R
$_0A
R
$_0B
R
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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