參數(shù)資料
型號(hào): FPD85308
廠商: National Semiconductor Corporation
英文描述: Panel Timing Controller
中文描述: 小組定時(shí)控制器
文件頁數(shù): 28/31頁
文件大小: 474K
代理商: FPD85308
APPENDIX A: GPO Programming
Examples
(Continued)
GPO Programming Example #2:
Generate a control signal which transitions low 20 output
clocks after the beginning of each output line, has a pulse-
width (low) of 12 μs, and goes high during horizontal blank-
ing. This control signal is used as an output enable for the
gate drivers.
Horizontal time (clocks/line) = 1300 dot clocks
Vertical period (lines/frame) = 850 lines
Control is active beginning at line 2 and remains active for
768 lines.
GPO Vertical Start Register = 2
GPO Vertical Duration Register = 768d (300h)
Negative pulse goes low each line at output clock 20 corre-
sponding to when the 39/40 pixels are output on OR, OG,
OB, ER, EG, EB. Pulse remains low for 390 output clocks
(390 x 30.8 ns/clock = 12 μs). (Dual Bus output clock =
32.5 MHz for 65 MHz XGA video, 1024 pixels/line, 768
lines/frame).
Note:
6 counts are added to the output clock # because the GPO start count
begins 6 clocks prior to the output data.
GPO Horizontal Start Register = 26d (1ah)
GPO Horizontal Duration Register = 390d (186h)
The control pulses are negative (bit [0] = 1) and the toggle
circuitry is disabled (bit1 [1] = 0).
GPO Control Register = 1
DS101356-24
F
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