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| 型號： | FPD85308 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Panel Timing Controller |
| 中文描述： | 小組定時(shí)控制器 |
| 文件頁數(shù)： | 26/31頁 |
| 文件大?。?/td> | 474K |
| 代理商： | FPD85308 |
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APPENDIX A: GPO Programming
Examples
The GPO control generation is based on the internal line
count and pixel count shown in Figure 9 and Figure 10 Two
programmable registers (Vertical Start and Vertical Duration)
control the vertical component of the control signal. This
establishes at what line and for how many lines the control
signal will be active. Likewise, two programmable registers
(Horizontal Start and Horizontal Duration) control the hori-
zontal component of the control signal. The Horizontal reg-
ister values determine at what pixel count the signal goes
active and for how many pixel counts the signal stays active
during each line. The Vertical Component enables the signal
for however many lines programmed for and the Horizontal
Component generates pulses within that vertical time period.
Generally the following types of signals are generated:
1.
DC (either 1 or 0)
2.
3.
4.
A pulse every line
A pulse once a frame (either in pixels or lines)
Pulsed during active video (pulses are blanked during
vertical blanking period of frame)
Table 4describes the programming requirements for general
types of pulses generated.
The GPO’s also have a “toggle mode”. This provides the
capability to generate a “REVERSAL” signal used in most
LCD applications. Bit 1 of the Control register is set to a 1 to
enable toggle mode operation. The GPO is programmed so
that a rising edge is produced when the control signal is
required to toggle. This generally occurs once each line.
Also, the # of edges generated per frame is programmed to
be an odd #. This ensures that the control signal will alter-
nate polarity from frame to frame.
Examples of GPO programming to produce specific control
signals are included in the following pages.
TABLE 4. GPO Pulse Generation
Vertical
Start
=don’t care
Vertical
Duration
=0
Horizontal
Start
=0
Horizontal
Duration
=0
GPO Output
Stuck 0 (When Output Polarity = 0)
Stuck 1 (When Output Polarity = 1)
Polarity control is in GPO Control Register bit 0
Stuck 1 (When Output Polarity = 0)
Stuck 0 (When Output Polarity = 1)
Polarity control is in GPO Control Register bit 0
Pulse is generated every line beginning at
～
#A
32 MHz clocks from start of output line and lasting for
#B 32 MHz clocks
Pulse begins at line #A , clock #C and continues to
line #(A+B) pixel #C (multi-line pulse)
Pulse generation begins at line A and continues for #B
lines. Each pulse begins at
～
pixel #C and lasts for D
counts
=don’t care
=0
#
A
=0
=don’t care
=0
#A
#B
(Note 29)
#A
#B
#C
=0
#A
#B
#C
#D
(Note 29)
Note 29:
Pulses will occur every other line if Horizontal Duration is greater than a line time.
F
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| FPD87310 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Universal Interface XGA Panel Timing Controller with RSDS⑩ (Reduced Swing Differential Signaling) and FPD-Link |
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