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參數(shù)資料
| 型號： | FIN24CGFX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | uSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer |
| 中文描述： | LINE TRANSCEIVER, PBGA42 |
| 封裝： | 3.5 MM, LEAD FREE, MO-195, BGA-42 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 758K |
| 代理商： | FIN24CGFX |
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F
MLP Terminal Description
Note 1:
The DSO/DSI serial port terminals have been arranged such that when one device is rotated 180 degrees with the other device the serial connections will properly align
without the need for any traces or cable signals to cross. Other layout orientations may require that traces or cables cross.
BGA Terminal Assignments
MLP
Terminal
Name
I/O Type
Number of
Terminals
Description of Signals
DP[1:20]
I/O
20
LVCMOS Parallel I/O. Direction controlled by DIRI Terminal
DP[21:24]
I or O
4
LVCMOS Parallel Unidirectional Inputs or Outputs Dependent on State of S1, S2
Terminals
CKREF
IN
1
LVCMOS Clock Input and PLL Reference
STROBE
IN
1
LVCMOS Strobe Signal for Latching Data into the Serializer
CKP
OUT
1
LVCMOS Word Clock Output
DSO / DSI
DSO / DSI
DIFF-I/O
2
CTL Differential Serial I/O Data Signals (Note 1)
DSO: Refers to output signal pair
DSI: Refers to input signal pair
DSO(I) : Positive signal of DSO(I) pair
DSO(I) : Negative signal of DSO(I) pair
CKSI , CKSI
DIFF-IN
2
CTL Differential Deserializer Input Bit Clock
CKSI: Refers to signal pair
CKSI : Positive signal of CKSI pair
CKSI : Negative signal of CKSI pair
CKSO , CKSO
DIFF-OUT
2
CTL Differential Serializer Output Bit Clock
CKSO: Refers to signal pair
CKSO : Positive signal of CKSO pair
CKSO : Negative signal of CKSO pair
S1
IN
1
LVCMOS Mode Selection Pins used to define mode of operation for some
terminals. The control terminals, DP[21:24] can be set as 4 terminals in the same
direction or two in each direction.
S2
IN
1
DIRI
IN
1
LVCMOS Control Input
Used to control direction of Data Flow
DIRO
OUT
1
LVCMOS Control Output
Inversion of DIRI
V
DDP
V
DDS
V
DDA
GND
Supply
1
Power Supply for Parallel I/O and Translation Circuitry
Supply
1
Power supply for core circuitry and serial I/O
Supply
1
Power Supply for Analog PLL Circuitry
Supply
0
Use Bottom Ground Plane for Ground Signals
1
2
3
4
5
6
A
DP[9]
DP[7]
DP[5]
DP[3]
DP[1]
CKREF
B
DP[11]
DP[10]
DP[6]
DP[2]
STROBE
DIRO
C
CKP
DP[12]
DP[8]
DP[4]
CKSO
CKSO
D
DP[13]
DP[14]
V
DDP
GND
GND
DSO / DSI
DSO / DSI
E
DP[15]
DP[16]
V
DDS
V
DDA
DP[23]
CKSI
CKSI
F
DP[17]
DP[18]
DP[21]
S2
DIRI
J
DP[19]
DP[20]
DP[22]
DP[24]
S1
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