參數(shù)資料
型號: FIN24CGFX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: uSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer
中文描述: LINE TRANSCEIVER, PBGA42
封裝: 3.5 MM, LEAD FREE, MO-195, BGA-42
文件頁數(shù): 14/22頁
文件大小: 758K
代理商: FIN24CGFX
www.fairchildsemi.com
14
F
Control Logic Timing Controls
Note 10:
Deserializer enable time includes the amount of time required for internal voltage and current references to stabilize. This time is significantly less than the PLL Lock
Time and therefore will not limit overall system startup time.
Capacitance
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
t
PHL_DIR
,
Propagation Delay
DIRI LOW-to-HIGH or HIGH-to-LOW
17.0
ns
t
PLH_DIR
DIRI-to-DIRO
t
PLZ
,
Propagation Delay
DIRI LOW-to-HIGH
25.0
ns
t
PHZ
DIRI-to-DP
t
PZL
,
Propagation Delay
DIRI HIGH-to-LOW
25.0
ns
t
PZH
DIRI-to-DP
t
PLZ
,
Deserializer Disable Time:
DIRI = 0,
25.0
ns
t
PHZ
S0 or S1 to DP
S1(2) = 0 and S2(1) = LOW-to-HIGH
Figure 27
t
PZL
,
Deserializer Enable Time:
DIRI = 0,
(Note 10)
2.0
s
t
PZH
S0 or S1 to DP
S1(2) = 0 and S2(1) = LOW-to-HIGH
Figure 27
t
PLZ
,
Serializer Disable Time:
DIRI = 1,
25.0
ns
t
PHZ
S0 or S1 to CKSO, DS
S1(2) = 0 and S2(1) = HIGH-to-LOW
Figure 25
t
PZL
,
Serializer Enable Time:
DIRI = 1,
65.0
ns
t
PZH
S0 or S1 to CKSO, DS
S1(2) = 0 and S2(1) = LOW-to-HIGH
Figure 25
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
C
IN
Capacitance of Input Only Signals,
DIRI = 1, S1 = S2 = 0,
2.0
pF
CKREF, STROBE, S1, S2, DIRI
V
DDP
= 2.5V
C
IO
Capacitance of Parallel Port Pins
DIRI = 1, S1 = S2 = 0,
2.0
pF
DP[1:12]
V
DDP
= 2.5V
C
IO-DIFF
Capacitance of Differential I/O Signals
DIRI = 0, S1 = 0, S2 = 0
2.0
pF
V
DDP
= 2.775V
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