參數(shù)資料
型號(hào): FDZ2553NZ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Monolithic Common Drain N-Channel 2.5V Specified PowerTrench BGA MOSFET
中文描述: 9.6 A, 20 V, 0.014 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET
封裝: ULTRA THIN, BGA-18
文件頁數(shù): 2/6頁
文件大小: 155K
代理商: FDZ2553NZ
FDZ2553NZ Rev C (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
TJ
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSS
Gate–Body Leakage
V
GS
= 0 V,
ID = 250
μ
A, Referenced to 25
°
C
I
D
= 250
μ
A
20
V
Breakdown Voltage Temperature
12
mV/
°
C
V
DS
= 16 V,
V
GS
=
±
12 V,
V
GS
= 0 V
V
DS
= 0 V
1
μ
A
μ
A
±
10
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
TJ
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
(Note 2)
V
DS
= V
GS
,
ID = 250
μ
A, Referenced to 25
°
C
V
GS
= 4.5 V,
I
D
= 9.6 A
V
GS
= 2.5 V,
I
D
= 7.9 A
V
GS
= 4.5 V, I
D
= 9.6 A, T
J
=125
°
C
V
GS
= 4.5 V,
V
DS
= 5 V
V
DS
= 5 V,
I
D
= 9.6 A
I
D
= 250
μ
A
0.6
0.9
–0.3
1.5
V
Gate Threshold Voltage
mV/
°
C
12
16
16
20
45
14
20
24
m
A
S
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
10
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
1240
320
170
2.1
pF
pF
pF
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
10
14
26
11
13
3
3
20
26
42
19
18
ns
ns
ns
ns
nC
nC
nC
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 10 V,
V
GS
= 5 V
I
D
= 9.6 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
1.7
1.2
A
V
V
GS
= 0 V,
I
S
= 1.7 A
(Note 2)
0.7
20
6
nS
nC
I
F
= 9.6A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
θ
JA
is determined with the device mounted on a 1 in2 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
the circuit board side of the solder ball, R
θ
JB
, is defined for reference. For R
θ
JC
, the thermal reference point for the case is defined as the top surface of the
copper chip carrier. R
θ
JC
and R
θ
JB
are guaranteed by design while R
θ
JA
is determined by the user's board design.
(a).
R
θ
JA
= 60°C/W when mounted on a 1in
2
pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB
(b).
R
θ
JA
= 108°C/W when mounted on a minimum pad of 2 oz copper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
3.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
F
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