參數(shù)資料
型號: FDS6680S
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: 30V N-Channel PowerTrench SyncFET⑩
中文描述: 0.011 ohm, Si, POWER, FET
封裝: SOIC-8
文件頁數(shù): 2/9頁
文件大?。?/td> 222K
代理商: FDS6680S
FDS6680S Rev A (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage, Forward
I
GSSR
Gate–Body Leakage, Reverse
V
GS
= 0 V, I
D
= 1 mA
30
V
Breakdown Voltage Temperature
I
D
= 1 mA, Referenced to 25
°
C
19
mV/
°
C
V
DS
= 24 V,
V
GS
= 20 V,
V
GS
= –20 V
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
1
mA
nA
nA
100
–100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
(Note 2)
V
DS
= V
GS
, I
D
= 1 mA
I
D
= 1 mA, Referenced to 25
°
C
1
2
3
V
Gate Threshold Voltage
-3.3
mV/
°
C
V
GS
= 10 V,
V
GS
= 4.5 V,
V
GS
=10 V, I
D
=11.5A, T
J
=125
°
C
V
GS
= 10 V,
V
DS
= 15 V,
I
D
= 11.5 A
I
D
= 9.5 A
9.5
13.5
17
11
16
23
m
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
V
DS
= 5 V
I
D
= 11.5 A
50
A
S
27
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
2010
526
186
pF
pF
pF
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
Switching Characteristics
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
(Note 2)
10
10
34
14
17
6.2
5.5
18
18
55
23
24
ns
ns
ns
ns
nC
nC
nC
V
DS
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 15 V,
V
GS
= 5 V
I
D
= 11.5 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
3.5
0.7
A
V
V
GS
= 0 V,
V
GS
= 0 V,
I
F
= 11.5A,
d
iF
/d
t
= 300 A/μs
I
S
= 3.5 A
I
S
= 7 A
(Note 2)
(Note 2)
0.45
0.6
20
19.7
nS
nC
(Note 3)
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) 50°/W when
mounted on a 1 in
2
pad of 2 oz copper
b) 105°/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
3.
See “SyncFET Schottky body diode characteristics” below.
F
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