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參數(shù)資料
| 型號(hào)： | FDS2672 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | N-Channel UltraFET Trench㈢ MOSFET 200V, 3.9A, 70mз |
| 中文描述： | 3.9 A, 200 V, 0.148 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | ROHS COMPLIANT, SO-8 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大小： | 360K |
| 代理商： | FDS2672 |
F
FDS2672 Rev. B
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I
D
= 250
μ
A, V
GS
= 0V
200
V
I
D
= 250
μ
A, referenced to 25°C
206
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 160V, V
GS
=0V
V
DS
= 160V, V
GS
=0V T
J
= 55°C
V
GS
= ±20V
1
μ
A
μ
A
nA
10
I
GSS
Gate to Source Leakage Current
±100
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= 250
μ
A
2
2.9
4
V
I
D
= 250
μ
A, referenced to 25°C
-11
mV/°C
r
DS(on)
Drain to Source On Resistance
V
GS
= 10V, I
D
= 3.9A
V
GS
= 6V, I
D
= 3.5A
V
GS
= 10V, I
D
= 3.9A, T
J
= 125°C
V
DS
= 10V,I
D
= 3.9A
59
63
124
15
70
80
148
m
g
FS
Forward Transcondductance
S
(Note 2)
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS
= 100V, V
GS
= 0V,
f = 1MHz
1905
100
30
0.7
2535
135
45
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller”Charge
V
DD
= 100V, I
D
= 3.9A
V
GS
= 10V, R
GEN
= 6
22
10
35
10
33
11
7
35
20
56
20
46
ns
ns
ns
ns
nC
nC
nC
V
DD
=100V I
D
= 3.9A
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0V, I
S
= 3.9A
I
F
= 3.9A, di/dt = 100A/
μ
s
I
F
= 3.9A, di/dt = 100A/
μ
s
0.75
67
179
1.2
101
269
V
ns
nC
Notes:
1:
R
is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user’s board design.
2:
Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%.
3:
Starting T
J
= 25
°
C, L = 3mH, I
AS
= 5A, V
DD
= 100V, V
GS
= 10V
Scale 1:1 on letter size paper
a)
50°C/W (10 sec)
62.5°C/W steady state
when mounted on a 1in
2
pad of 2 oz copper
b)
125°C/W when mounted on a
minimum pad .
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