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參數(shù)資料
| 型號(hào)： | FDR856P |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | P-Channel Logic Level Enhancement Mode Field Effect Transistor |
| 中文描述： | 5100 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | SUPERSOT-8 |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大?。?/td> | 223K |
| 代理商： | FDR856P |
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
BV
DSS
/
T
J
I
DSS
Zero Gate Voltage Drain Current
Conditions
Min
Typ
Max
Units
V
GS
= 0 V, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-30
V
Breakdown Voltage Temp. Coefficient
-15
mV /
o
C
V
DS
= -24 V, V
GS
= 0 V
-1
μA
T
J
= 55°C
-10
μA
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Gate - Body Leakage, Forward
V
GS
= -20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
-100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-1
-1.5
-3
V
Gate Threshold Voltage Temp. Coefficient
3
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= -10 V, I
D
= -6.3 A
0.022
0.025
T
J
=125°C
0.03
0.042
V
GS
= -4.5 V, I
D
= -5 A
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -6.3 A
0.033
0.04
I
D(ON)
g
FS
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
t
r
Turn - On Rise Time
On-State Drain Current
-50
A
Forward Transconductance
15
S
V
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
1370
pF
740
pF
220
pF
V
DS
= -15 V, I
D
= -1 A
V
GS
= -10 V , R
G
= 6
7
14
ns
12
19
ns
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
V
SD
Drain-Source Diode Forward Voltage
Turn - Off Delay Time
80
100
ns
Turn - Off Fall Time
130
160
ns
Total Gate Charge
V
DS
= -15 V, I
D
= -6.3 A,
V
GS
= -10 V
22
31
nC
Gate-Source Charge
3.8
nC
Gate-Drain Charge
8.7
nC
-1.3
A
V
GS
= 0 V, I
S
= -1.3 A
(Note 2)
-0.73
-1.2
V
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDR856P Rev.B
c. 125
of 2oz copper.
O
C/W on a 0.003 in
2
pad
b. 105
O
C/W on a 0.02 in
2
pad of 2oz copper.
a. 50
O
C/W on a 0.5 in
2
pad of 2oz copper.
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