參數(shù)資料
型號： FDMS3672
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： JFETs
英文描述： N-Channel UltraFET Trench MOSFET 100V, 22A, 23mohm
中文描述： 22 A, 100 V, 0.023 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝： ROHS COMPLIANT, POWER56, 8 PIN
文件頁數(shù)： 2/7頁
文件大小： 259K
代理商： FDMS3672
F
M
FDMS3672 Rev.C
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I
D
= 250
μ
A, V
GS
= 0V
100
V
I
D
= 250
μ
A, referenced to 25°C
104
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 80V,
V
GS
= 0V
V
GS
= ±20V, V
DS
= 0V
1
μ
A
T
J
= 55°C
10
±100
I
GSS
Gate to Source Leakage Current
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= 250
μ
A
2
3.1
4
V
I
D
= 250
μ
A, referenced to 25°C
-11
mV/°C
r
DS(on)
Drain to Source On Resistance
V
GS
= 10V, I
D
= 7.4A
V
GS
= 6V, I
D
= 6.6A
V
GS
= 10V, I
D
= 7.4A, T
J
= 125°C
V
DS
= 10V, I
D
= 7.4A
19
24
33
20
23
29
40
m
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
g
Gate Resistance
V
DS
= 50V, V
GS
= 0V,
f = 1MHz
2015
210
90
1.3
2680
280
135
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
Q
g
Total Gate Charge at 10V
Q
g
Total Gate Charge at 4.5V
Q
gs
Gate to Source Gate Charge
Q
gd
Gate to Drain “Miller” Charge
V
DD
= 50V, I
D
= 7.4A
V
GS
= 10V, R
GEN
= 6
23
11
36
8
31
37
20
58
16
44
ns
ns
ns
ns
nC
nC
nC
nC
V
GS
= 0V to 10V
V
GS
= 0V to 4.5V
V
DD
= 50V
I
D
= 7.4A
9.5
8
Drain-Source Diode Characteristics
V
SD
Source to Drain Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
Notes:
1:
R
is determined with the device mounted on a 1in
2
pad 2 oz copper pad on a 1.5
x 1.5 in. board of FR-4 material. R
θ
JC
is guaranteed by design while
R
θ
CA
is determined by
the user's board design.
V
GS
= 0V, I
S
= 7.4A (Note 2)
0.8
52
101
1.2
78
152
V
ns
nC
I
F
= 7.4A, di/dt = 100A/
μ
s
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
a. 50°C/W when mounted on
a 1 in
pad of 2 oz copper
b. 125°C/W when mounted on a
minimum pad of 2 oz copper
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