參數(shù)資料
型號(hào): FDMA1025P
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Dual P-Channel PowerTrench MOSFET -20V, -3.1A, 105mohm
中文描述: 3.1 A, 20 V, 0.22 ohm, 2 CHANNEL, P-CHANNEL, Si, POWER, MOSFET
封裝: ROHS COMPLIANT, 6 PIN
文件頁(yè)數(shù): 1/6頁(yè)
文件大小: 338K
代理商: FDMA1025P
tm
December 2006
F
M
2006 Fairchild Semiconductor Corporation
FDMA1025P Rev.B
www.fairchildsemi.com
1
FDMA1025P
Dual P-Channel PowerTrench
MOSFET
20V,
3.1A, 105m
Features
Max r
DS(on)
= 155m
at V
GS
=
4.5V, I
D
=
3.1A
Max r
DS(on)
= 220m
at V
GS
=
2.5V, I
D
=
2.3A
Low profile - 0.8mm maximum - in the new package MicroFET
2X2 mm‘
RoHS Compliant
General Description
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other ultra -
portable applications. It features two independent P-Channel
MOSFETs with low on-state resistance for minimum conduction
losses. When connected in the typical common source
configuration, bi-directional current flow is possible.
The MicroFET 2X2 package offers exceptional thermal
performance for its physical size and well suited to linear mode
applications.
Application
DC - DC
Conversion
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol
V
DS
V
GS
Parameter
Ratings
20
±12
3.1
6
1.4
0.7
55 to +150
Units
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Note 1a)
-Pulsed
Power Dissipation for Single Operation (Note 1a)
Power Dissipation (Note 1b)
Operating and Storage Junction Temperature Range
I
D
A
P
D
W
T
J
, T
STG
°
C
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
Thermal Resistance Single Operation, Junction to Ambient (Note 1a)
86
°C/W
Thermal Resistance Single Operation, Junction to Ambient (Note 1b)
173
Thermal Resistance Dual Operation, Junction to Ambient
69
Thermal Resistance Dual Operation, Junction to Ambient
151
Device Marking
025
Device
FDMA1025P
Package
MLP2X2
Reel Size
7’’
Tape Width
8mm
Quantity
3000 units
MicroFET 2X2
1
6
5
2
4
3
S1
G1
D2
D1
G2
S2
S2
G2
D1
D2
G1
S1
PIN 1
D1
D2
1
3
2
6
5
4
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