參數(shù)資料
型號: FDC645N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號晶體管
英文描述: N-Channel PowerTrench MOSFET
中文描述: 5.5 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SUPERSOT-6
文件頁數(shù): 2/8頁
文件大?。?/td> 313K
代理商: FDC645N
FDC645N Rev B(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
===
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage, Forward
I
GSSR
Gate–Body Leakage, Reverse
V
GS
= 0 V, I
D
= 250
μ
A
30
V
Breakdown Voltage Temperature
I
D
= 250
μ
A, Referenced to 25
°
C
22
mV/
°
C
V
DS
= 24 V, V
GS
= 0 V
V
GS
= 12 V, V
DS
= 0 V
V
GS
= –12 V, V
DS
= 0 V
1
μ
A
nA
nA
100
–100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
===
T
J
Temperature Coefficient
(Note 2)
V
DS
= V
GS
, I
D
= 250
μ
A
I
D
= 250
μ
A, Referenced to 25
°
C
0.8
1.4
2
V
Gate Threshold Voltage
– 4
mV/
°
C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= 4.5 V, I
D
= 5.5 A
V
GS
= 10 V, I
D
= 6.2 A
V
GS
= 4.5 V, I
D
= 5.5 A, T
J
=125
°
C
V
GS
= 4.5 V, V
DS
= 5 V
V
DS
= 10 V,
I
D
= 5.5 A
25
23
34
30
26
48
m
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
20
A
S
33
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
1460
227
96
pF
pF
pF
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
Switching Characteristics
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
(Note 2)
8
9
35
7
13
3.6
3.6
16
18
56
14
21
ns
ns
ns
ns
nC
nC
nC
V
DS
= 15 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
V
DS
= 15 V, I
D
= 6.2 A,
V
GS
= 4.5 V
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
1.3
A
V
SD
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
0.7
1.2
V
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a. 78°C/W when mounted on a 1in
2
pad of 2oz copper on FR-4 board.
b. 156°C/W when mounted on a minimum pad.
2.
Pulse Test: Pulse Width
=
300
μ
s, Duty Cycle
=
2.0%
F
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