參數(shù)資料
型號(hào)： EVAL-ADV7180-32EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 114/116頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADV7180
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®
主要目的： 視頻，SDTV 視頻解碼器 - NTSC，PAL，SECAM
嵌入式： 否
已用 IC / 零件： ADV7180
主要屬性： CVBS（復(fù)合），Y/C（S 視頻）和 YPrPb（元件）輸入
次要屬性： 8 位 ITU-R BT.656 YCrCb 4:2:2 輸出
已供物品： 板
Data Sheet
ADV7180
Rev. I | Page 97 of 116
Main Map
Bit Description
Bits
(Shading Indicates Default State)
Comments
Notes
Subaddress
Register
7
6
5
4
3
2
1
0
0xE4
SD Saturation Cr
SD_SAT_Cr[7:0]; adjusts
the saturation by affecting
gain on the Cr channel
0
Gain on Cr channel = 42 dB
1
0
Gain on Cb channel = 0 dB
1
Gain on Cb channel = +6 dB
0xE5
NTSC V bit
begin
NVBEG[4:0]; number of
lines after lCOUNT rollover
to set V high
0
1
0
1
NTSC default (ITU-R BT.656)
NVBEGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NVBEGDELE; delay V bit
going high by one line
relative to NVBEG (even
field)
0
No delay
1
Additional delay by one line
NVBEGDELO; delay V bit
going high by one line
relative to NVBEG (odd
field)
0
No delay
1
Additional delay by one line
0xE6
NTSC V bit end
NVEND[4:0]; number of
lines after lCOUNT rollover
to set V low
0
1
0
NTSC default (ITU-R BT.656)
NVENDSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NVENDDELE; delay V bit
going low by one line
relative to NVEND (even
field)
0
No delay
1
Additional delay by one line
NVENDDELO; delay V bit
going low by one line
relative to NVEND (odd
field)
0
No delay
1
Additional delay by one line
0xE7
NTSC F bit
toggle
NFTOG[4:0]; number of
lines after lCOUNT rollover to
toggle F signal
0
1
NTSC default
NFTOGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NFTOGDELE; delay
F transition by one line
relative to NFTOG (even
field)
0
No delay
1
Additional delay by one line
NFTOGDELO; delay
F transition by one line
relative to NFTOG
(odd field)
0
No delay
1
Additional delay by one line
0xE8
PAL V bit begin
PVBEG[4:0]; number of
lines after lCOUNT rollover
to set V high
0
1
0
1
PAL default (ITU-R BT.656)
PVBEGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
PVBEGDELE; delay V bit
going high by one line
relative to PVBEG (even
field)
0
No delay
1
Additional delay by one line
PVBEGDELO; delay V bit
going high by one line
relative to PVBEG (odd
field)
0
No delay
1
Additional delay by one line
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EVAL-ADV7180LFEBZ 功能描述:BOARD EVAL FOR ADV7180 LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:Advantiv® 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源
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