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參數(shù)資料
| 型號： | EVAL-ADF4360-8EBZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR ADF4360-8 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，頻率合成器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADF4360-8 |
| 主要屬性： | 帶 VCO 的單路整數(shù)-N PLL |
| 次要屬性： | 120MHz，1MHz PFD |
| 已供物品： | 板，線纜，軟件 |
| 相關(guān)產(chǎn)品： | ADF4360-8BCPZ-ND - IC SYNTHESIZER VCO 24-LFCSP ADF4360-8BCPZRL7TR-ND - IC SYNTHESIZER VCO 24LFCSP ADF4360-8BCPZRL-ND - IC SYNTHESIZER VCO 24LFCSP |
| 其它名稱： | Q4990657 |
ADF4360-8
Rev. A | Page 4 of 24
Parameter
B Version
Unit
Conditions/Comments
Harmonic Content (Third)
21
dBc typ
Output Power5, 7
9/0
dBm typ
Using tuned load, programmable in 3 dB steps; see Table 7
Output Power5, 8
14/9
dBm typ
Output Power Variation
±3
dB typ
VCO Tuning Range
1.25/2.5
V min/max
NOISE CHARACTERISTICS5
VCO Phase Noise Performance9
120
dBc/Hz typ
@ 100 kHz offset from carrier
139
dBc/Hz typ
@ 800 kHz offset from carrier
140
dBc/Hz typ
@ 3 MHz offset from carrier
142
dBc/Hz typ
@ 10 MHz offset from carrier
Synthesizer Phase Noise Floor10
160
dBc/Hz typ
@ 200 kHz PFD frequency
150
dBc/Hz typ
@ 1 MHz PFD frequency
142
dBc/Hz typ
@ 8 MHz PFD frequency
Phase Noise Figure of Merit10
215
dBc/Hz typ
In-Band Phase Noise11, 12
102
dBc/Hz typ
@ 1 kHz offset from carrier
RMS Integrated Phase Error13
0.09
Degrees typ
100 Hz to 100 kHz
Spurious Signals due to PFD
Frequency12, 14
75
dBc typ
Level of Unlocked Signal with
MTLD Enabled
70
dBm typ
1 Operating temperature range is –40°C to +85°C.
2 Guaranteed by design. Sample tested to ensure compliance.
3 ICP is internally modified to maintain constant loop gain over the frequency range.
4 TA = 25°C; AVDD = DVDD = VVCO = 3.3 V.
5 Unless otherwise stated, these characteristics are guaranteed for VCO core power = 5 mA. L1, L2 = 270 nH, 470 resistors to GND in parallel with L1, L2.
6 Jumping from 88 MHz to 108 MHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7 For more detail on using tuned loads, see the Output Matching section.
8 Using 50 resistors to VVCO, into a 50 load.
9 The noise of the VCO is measured in open-loop conditions.
10 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value). The
phase noise figure of merit subtracts 10 log (PFD frequency).
11 The phase noise is measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN for the
synthesizer; offset frequency = 1 kHz.
12 fREFIN = 10 MHz; fPFD = 200 kHz; N = 1000; loop B/W = 10 kHz.
13 fREFIN = 10 MHz; fPFD = 1 MHz; N = 120; loop B/W = 100 kHz.
14 The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN
for the synthesizer; fREFOUT = 10 MHz @ 0 dBm.
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