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參數(shù)資料
| 型號： | EVAL-ADF4106EBZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADF4106 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，頻率合成器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADF4106 |
| 主要屬性： | 單路整數(shù)-N PLL |
| 次要屬性： | 6GHz 圖形用戶界面 |
| 已供物品： | 板，線纜，軟件 |
| 相關(guān)產(chǎn)品： | ADF4106BCPZ-ND - IC PLL FREQ SYNTHESIZER 20LFCSP ADF4106BRUZ-R7-ND - IC PLL FREQ SYNTHESIZER 16TSSOP ADF4106BCPZ-R7-ND - IC PLL FREQ SYNTHESIZER 20LFCSP ADF4106BCPZ-RL-ND - IC PLL FREQ SYNTHESIZER 20LFCSP ADF4106BRUZ-RL-ND - IC PLL FREQ SYNTHESIZER 16TSSOP ADF4106BRUZ-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP ADF4106BRU-REEL7-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP ADF4106BRU-REEL-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP ADF4106BRU-ND - IC PLL FREQ SYNTHESIZER 16-TSSOP |
Data Sheet
ADF4106
Rev. E | Page 3 of 24
SPECIFICATIONS
AVDD = DVDD = 3 V ± 10%, AVDD ≤ VP ≤ 5.5 V, AGND = DGND = CPGND = 0 V, RSET = 5.1 kΩ, dBm referred to 50 Ω, TA = TMAX to TMIN,
unless otherwise noted.
Table 1.
Parameter
B Version1
B Chips2 (typ)
Unit
Test Conditions/Comments
RF CHARACTERISTICS
See Figure 18 for input circuit
RF Input Frequency (RFIN)
0.5/6.0
GHz min/max
For lower frequencies, ensure
slew rate (SR) > 320 V/μs
RF Input Sensitivity
–10/0
dBm min/max
Maximum Allowable Prescaler
Output Frequency3
300
MHz max
P = 8
325
MHz max
P = 16
REFIN CHARACTERISTICS
REFIN Input Frequency
20/300
MHz min/max
For f < 20 MHz, ensure SR > 50 V/μs
0.8/VDD
V p-p min/max
REFIN Input Capacitance
10
pF max
REFIN Input Current
±100
μA max
PHASE DETECTOR
Phase Detector Frequency6
104
MHz max
ABP = 0, 0 (2.9 ns antibacklash pulse width)
CHARGE PUMP
Programmable, see Table 9
ICP Sink/Source
High Value
5
mA typ
With RSET = 5.1 kΩ
Low Value
625
μA typ
Absolute Accuracy
2.5
% typ
With RSET = 5.1 kΩ
RSET Range
3.0/11
kΩ typ
ICP Three-State Leakage
2
nA max
1 nA typical; TA = 25°C
Sink and Source Current Matching
2
% typ
0.5 V ≤ VCP ≤ VP 0.5 V
ICP vs. VCP
1.5
% typ
0.5 V ≤ VCP ≤ VP 0.5 V
ICP vs. Temperature
2
% typ
VCP = VP/2
LOGIC INPUTS
VIH, Input High Voltage
1.4
V min
VIL, Input Low Voltage
0.6
V max
IINH, IINL, Input Current
±1
μA max
CIN, Input Capacitance
10
pF max
LOGIC OUTPUTS
VOH, Output High Voltage
1.4
V min
Open-drain output chosen, 1 kΩ pull-up
resistor to 1.8 V
VOH, Output High Voltage
VDD 0.4
V min
CMOS output chosen
IOH
100
μA max
VOL, Output Low Voltage
0.4
V max
IOL = 500 μA
POWER SUPPLIES
AVDD
2.7/3.3
V min/V max
DVDD
AVDD
VP
AVDD/5.5
V min/V max
AVDD ≤ VP ≤ 5.5V
11
9.0
mA max
9.0 mA typ
11.5
9.5
mA max
9.5 mA typ
13
10.5
mA max
10.5 mA typ
IP
0.4
mA max
TA = 25°C
Power-Down Mode10
(AIDD + DIDD)
10
μA typ
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