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參數(shù)資料
| 型號： | EVAL-AD5382EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5382 |
| 產品培訓模塊： | DAC Architectures |
| 標準包裝： | 1 |
| DAC 的數(shù)量： | 32 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125k |
| 數(shù)據(jù)接口： | DSP，I²C，MICROWIRE?，并行，QSPI?，SPI? |
| 設置時間： | 8µs |
| DAC 型： | 電壓 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5382 |
| 其它名稱： | Q4391457 |
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AD5382
Data Sheet
Rev. C | Page 34 of 40
MONITOR FUNCTION
The AD5382 channel monitor function consists of a multiplexer
addressed via the interface, allowing any channel output to be
routed to this pin for monitoring using an external ADC.
The channel monitor function must be enabled in the control
register before any channels are routed to MON_OUT. Table 17
contains the decoding information required to route any chan-
nel to MON_OUT. External signals within the AD5382’s
absolute maximum input range can be connected to the
MON_IN pins and monitored at MON_OUT. Selecting
Channel Address 63 three-states MON_OUT. Figure 40 shows
a typical monitoring circuit implemented using a 12-bit SAR
ADC in a 6-lead SOT-23 package. The controller output port
selects the channel to be monitored, and the input port reads
the converted data from the ADC.
TOGGLE MODE FUNCTION
The toggle mode function allows an output signal to be gener-
ated using the LDAC control signal that switches between two
DAC data registers. This function is configured using the SFR
control register as follows. A write with REG1 = REG0 = 0 and
A4–A0 = 01100 specifies a control register write. The toggle
mode function is enabled in groups of eight channels using bits
CR5 to CR2 in the control register. See the AD5382 control
register contents in Table 15. Figure 41 shows a block diagram
of toggle mode implementation. Each of the 32 DAC channels
on the AD5382 contains an A and B data register. Note that the
B registers can be loaded only when toggle mode is enabled.
The sequence of events when configuring the AD5382 for
toggle mode is as follows:
1. Enable toggle mode for the required channels via the
control register.
2. Load data to the A registers.
3. Load data to the B registers.
4. Apply LDAC.
The LDAC is used to switch between the A and B registers in
determining the analog output. The first LDAC configures the
output to reflect the data in the A registers. This mode offers
significant advantages if the user wants to generate a square
wave at the output of all 32 channels, as might be required to
drive a liquid crystal-based variable optical attenuator. In this
case, the user writes sets the control register and enables the
toggle function by setting CR5 to CR2 = 1, thus enabling the
four groups of eight for toggle mode operation. The user must
then load data to all 32 A and B registers. Toggling LDAC will
set the output values to reflect the data in the A and B registers.
The frequency of the LDAC determines the frequency of the
square wave output.
Toggle mode is disabled via the control register. The first LDAC
following the disabling of the toggle mode updates the outputs
with the data contained in the A registers.
AD7476
GND
SDATA
CS
SCLK
AVCC
VIN
MON_OUT
AGND
DIN
SYNC
SCLK
DAC_GND SIGNAL_GND
VOUT0
VOUT31
AVCC
AD5382
OUTPUT PORT
INPUT PORT
CONTROLLER
03733-041
AD780/
ADR431
REFOUT/REFIN
MON_IN1
MON_IN2
AVCC
Figure 40. Typical Channel Monitoring Circuit
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